Abstract: An advanced MESFET switching structure which includes an interdigitated source region and an interdigitated drain region, also includes a gate electrode region disposed between adjacent portions of the interdigitated source and drain regions having a series gate electrode in Schottky barrier contact therewith. The use of the series connect gate electrode rather than conventional parallel coupled gate fingers eliminates the need for an airbridge overlays to interconnect the source regions as in a conventional MESFET transducer. Moreover, the topography permits smaller MESFET structures and thus higher integration of circuits employing the advanced MESFET switch structure. The smaller transistors will also have lower parasitic reactances. In a preferred embodiment, all interconnections for drain, gate, and source electrodes are disposed on the active layer portion of the transistor providing an even smaller transistor structure.

Abstract: A distributed circuit includes a plurality of pairs of cascode coupled first and second transistors with each transistor having base, emitter, and collector electrodes. The first transistor of each pair is disposed to have a first one of emitter and collector electrodes coupled to a reference potential and the second one of said transistors of each pair is disposed to have the base electrode coupled to a reference potential with the second one the collector and emitter electrodes of the first transistor of each pair being coupled to the emitter electrode of the corresponding second transistor of each pair. The network further includes an input propagation network disposed to successively couple the base electrode of each one of the first transistors of each pair of transistors to an input terminal and an output propagation network disposed to couple the collector electrodes of each one of the second transistors of each one of the pair of transistors to an output terminal of the circuit.

Abstract: A radio frequency amplifier including a plurality of field effect transistors having input electrodes successively coupled by an input propagation network and output electrode successively coupled by an output propagation network is described. The radio frequency circuit includes a feedback circuit, preferably a plurality of feedback circuits, each one being disposed about a corresponding one of the plurality of transistors to provide a negative feedback path about each one of said transistors.

Abstract: A transceiver module includes a bi-directional amplifier having a pair of symmetric signal paths for amplification of both transmit and receive signals is described. The amplifier is a bi-directional amplifier and includes a pair of symmetric signal paths. The amplifier is disposed between a pair of r.f. switches to provide a pair of signal paths between two terminals of the module. A phase shifter is coupled between one of the terminals of the module and one of the r.f. switches, wherein the second terminal of the module is coupled directly to the other one of the pair of switches.

Abstract: A direct digital synthesizer (DDS) includes a phase accumulator which generates phase words periodically and means for changing the phase of an RF signal. In a preferred embodiment, a DDS includes a pair of phase shifter channels having inputs and outputs coupled in parallel by make before break RF switches. The use of the dual phase shifter channels and make before break RF switches provides relatively smooth phase advance while eliminating fly-back transitions. This arrangement reduces excessive noise power in the output signal.

Abstract: Transversal and recursive filters having an input propagation lumped element network with a band pass filter response, a low pass filter response, or a high pass filter response, and an output propagation network having a low pass frequency response, a high pass frequency response, or a band pass frequency response are described. Weighting means including a plurality of field effect transistors are used to successively couple the input propagation network and the output propagation network. The general shape or response of the transversal filter is provided by choosing the characteristics of the input and output propagation networks in relation to the desired filter response. With the general shape provided by the propagation networks rather than only by the transversal elements, fewer transversal elements are required to provide a desired response.

Abstract: A radio frequency matrix amplifier includes an input propagation network for successively connecting input electrodes of a first plurality of transistors. Output electrodes are successively coupled by an intermediate propagation network. The amplifier also includes a second plurality of transistors, having input electrodes successively coupled by the intermediate propagation network and output electrodes successively coupled by an output propagation network. A bias circuit for the amplifier includes an inductor connected between a last one of the second plurality of transistors and the intermediate propagation network and a plurality of capacitors disposed to connect reference electrodes of the second plurality of transistors to a reference potential. With this arrangement stages are connected in series for D.C. potentials and in cascade for r.f. potentials.

Abstract: A double balun circuit is provided by connecting two pairs of circut types. The first circuit, a distributed divider circuit, includes first and second pluralities of field effect transistors, a common input transmission line, and a first and second output transmission lines. The common input transmission line is disposed to successively couple the input electrodes of each transistor of both the first and second pluralities of transistors. The output lines are disposed to successively couple the output electrodes of the respective ones of the plurities of transistors. Each output transmission line is coupled to one of the pair of output terminals of the circuit.

Abstract: A distributed circuit includes a plurality of field effect transistors (FETS), each one of such FETS having gate, drain and source electrodes, with a first portion, or a first channel, of such FETS having gate electrodes and drain electrodes successively coupled between a first input terminal and a first ouput terminal, and a second like portion or a second channel of such FETS having gate electrodes and drain electrodes successively coupled between the first input terminal and a second output terminal. Separate bias circuits are provided to the input electrodes and the output electrodes of the first and second channels. Bias signals fed to the input bias circuits and coupled to the input electrodes to place the FETS in an "on" state to provide gain to r.f. input signals fed thereto, or in a "pinch-off" state to isolate r.f. signals fed to the input electrodes of the FETS. Accordingly, a 1.times.2 signal splitter or a 1.times.2 switch which provides gain to a signal is provided.

Abstract: An integrated field effect transistor capacitor structure having a capacitor connected between source and drain electrodes is described. In one embodiment, the capacitor is formed over a drain contact by providing a dielectric over said contact and an airbridge upper plate between said dielectric to the adjacent source contact. Preferably, the capacitor dielectric is the same dielectric as the FET passivation.

Abstract: A distributed amplifier includes a plurality of field effect transistors, each having gate, drain, and source electrodes, successively coupled between an input terminal and an output terminal. The gate electrode of each one of successively coupled FETS is coupled to the input terminal through a corresponding one of a plurality of capacitors and selected ones of the drain electrodes of the FETS are coupled to the output terminal through one of a corresponding second plurality of capacitors, with said capacitors being coupled to an output coupling means comprising a plurality of transmission line sections. By providing the second plurality of capacitors to couple the drain electrodes to the output terminal, the output impedance of each one of the field effect transistors is concomitantly increased thereby permitting the periphery of the transistors to be correspondingly increased and thereby providing increased output power and gain from the amplifier circuit.