Abstract: An inrush current limiting circuit includes a power FET switch connected between power source and load and a control circuit. The power FET switch includes one or more parallel-connected power FETs, each having low individual conductive resistances. The control circuit, connected between the power inputs and the gate of power FET switch, includes a voltage supply for providing sufficient voltage to turn the power FET switch on and a time constant circuit for controlling the rate at which the power FET means is turned on. With the voltage supply connected to an optional enable terminal, a DC enable signal can control powering of the load. A second time constant circuit controls the rate of power down.