Patents by Inventor Manfred Kunz

Manfred Kunz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11822494
    Abstract: A network switch includes a data bus, a register, an endpoint controller and a direct memory access controller. The endpoint controller is configured to receive a descriptor generated by a device driver of a host system, store the descriptor in the register, and transfer data between a root complex controller of the host system and the data bus. The descriptor identifies an address of a buffer in a memory of the host system. The direct memory access controller is configured to receive the address of the buffer from the endpoint controller or the register and, based on the address and an indication generated by the device driver, independently control transfer of the data between the memory of the host system and a network device connected to the network switch. The direct memory access controller is a receive direct memory access controller or a transmit direct memory access controller.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: November 21, 2023
    Assignee: Marvell Asia Pte, Ltd.
    Inventors: Manfred Kunz, Markus Althoff, Xiongzhi Ning
  • Patent number: 11522774
    Abstract: A network switch is disclosed. The network switch includes an input port and an output port. The network switch further includes a rule logic and a memory for storing a configurable counter. The rule logic is configured to inspect a packet received via the input port and attempt to find a rule for the packet and if the rule is found, to reset the counter and process the packet according to a preconfigured follow up action associated with the rule and if the rule is not found, to route the packet according to a default rule. The rule logic is configured to identify the packet for a follow up action based at least on a subset of content of the packet including a header and a payload of the packet. The counter may hold a time value or the number of packets from a same source to a same destination, a number of bytes received from the same source to a same destination, or a user configurable parameter to control the rule validity period.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: December 6, 2022
    Assignee: NXP B.V.
    Inventors: Christian Herber, Donald Robert Pannell, Manfred Kunz
  • Publication number: 20220342838
    Abstract: A network switch includes a data bus, a register, an endpoint controller and a direct memory access controller. The endpoint controller is configured to receive a descriptor generated by a device driver of a host system, store the descriptor in the register, and transfer data between a root complex controller of the host system and the data bus. The descriptor identifies an address of a buffer in a memory of the host system. The direct memory access controller is configured to receive the address of the buffer from the endpoint controller or the register and, based on the address and an indication generated by the device driver, independently control transfer of the data between the memory of the host system and a network device connected to the network switch. The direct memory access controller is a receive direct memory access controller or a transmit direct memory access controller.
    Type: Application
    Filed: July 11, 2022
    Publication date: October 27, 2022
    Inventors: Manfred KUNZ, Markus Althoff, Xiongzhi Ning
  • Publication number: 20220329503
    Abstract: A network switch is disclosed. The network switch includes an input port and an output port. The network switch further includes a rule logic and a memory for storing a configurable counter. The rule logic is configured to inspect a packet received via the input port and attempt to find a rule for the packet and if the rule is found, to reset the counter and process the packet according to a preconfigured follow up action associated with the rule and if the rule is not found, to route the packet according to a default rule. The rule logic is configured to identify the packet for a follow up action based at least on a subset of content of the packet including a header and a payload of the packet. The counter may hold a time value or the number of packets from a same source to a same destination, a number of bytes received from the same source to a same destination, or a user configurable parameter to control the rule validity period.
    Type: Application
    Filed: April 12, 2021
    Publication date: October 13, 2022
    Inventors: Christian Herber, Donald Robert Pannell, Manfred Kunz
  • Patent number: 11386027
    Abstract: A network switch includes a data bus, a register, an endpoint controller and a direct memory access controller. The endpoint controller is configured to receive a descriptor generated by a device driver of a host system, store the descriptor in the register, and transfer data between a root complex controller of the host system and the data bus. The descriptor identifies an address of a buffer in a memory of the host system. The direct memory access controller is configured to receive the address of the buffer from the endpoint controller or the register and, based on the address and an indication generated by the device driver, independently control transfer of the data between the memory of the host system and a network device connected to the network switch. The direct memory access controller is a receive direct memory access controller or a transmit direct memory access controller.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: July 12, 2022
    Assignee: Marvell Asia Pte, Ltd.
    Inventors: Manfred Kunz, Markus Althoff, Xiongzhi Ning
  • Publication number: 20200167300
    Abstract: A network switch includes a data bus, a register, an endpoint controller and a direct memory access controller. The endpoint controller is configured to receive a descriptor generated by a device driver of a host system, store the descriptor in the register, and transfer data between a root complex controller of the host system and the data bus. The descriptor identifies an address of a buffer in a memory of the host system. The direct memory access controller is configured to receive the address of the buffer from the endpoint controller or the register and, based on the address and an indication generated by the device driver, independently control transfer of the data between the memory of the host system and a network device connected to the network switch. The direct memory access controller is a receive direct memory access controller or a transmit direct memory access controller.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 28, 2020
    Inventors: Manfred KUNZ, Markus ALTHOFF, Xiongzhi NING
  • Patent number: 10469633
    Abstract: A conversion pipeline includes a media input stage, a packetizer, a MAC engine and a PHY interface. The media input stage is configured to receive from a media source a sequence of media frames carrying media content. The packetizer is configured to convert the media frames into a sequence of Ethernet packets by generating headers and appending portions of media frames to corresponding generated headers, including appending a first portion of a first media frame to a first generated header before the first media frame is fully received. The MAC engine is configured to commence outputting a first Ethernet packet as an uninterrupted unit, the first Ethernet packet including the first header and payload bits corresponding to the first portion of the first media frame, before the first media frame is fully received. The PHY interface is configured to transmit the Ethernet packets over a network.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: November 5, 2019
    Assignee: Marvell World Trade Ltd.
    Inventors: Thomas Kniplitsch, Manfred Kunz, Lukas Reinbold
  • Patent number: 10437773
    Abstract: An electronic system includes a slave device, multiple master devices and logic circuitry. The slave device is configured to communicate with a single master device in accordance with a single-master communication protocol. The multiple master devices are respectively configured to communicate with the slave device in accordance with the single-master communication protocol. The logic circuitry, which is disposed respectively in the multiple master devices, is configured to exchange control signals indicative of whether the slave device is available for access, so as to prevent simultaneous access attempts to the slave device by more than one of the master devices.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: October 8, 2019
    Assignee: Marvell World Trade Ltd.
    Inventors: Manfred Kunz, Markus Fischer
  • Publication number: 20190306287
    Abstract: A conversion pipeline includes a media input stage, a packetizer, a MAC engine and a PHY interface. The media input stage is configured to receive from a media source a sequence of media frames carrying media content. The packetizer is configured to convert the media frames into a sequence of Ethernet packets by generating headers and appending portions of media frames to corresponding generated headers, including appending a first portion of a first media frame to a first generated header before the first media frame is fully received. The MAC engine is configured to commence outputting a first Ethernet packet as an uninterrupted unit, the first Ethernet packet including the first header and payload bits corresponding to the first portion of the first media frame, before the first media frame is fully received. The PHY interface is configured to transmit the Ethernet packets over a network.
    Type: Application
    Filed: May 8, 2018
    Publication date: October 3, 2019
    Inventors: Thomas Kniplitsch, Manfred Kunz, Lukas Reinbold
  • Publication number: 20190171608
    Abstract: An electronic system includes a slave device, multiple master devices and logic circuitry. The slave device is configured to communicate with a single master device in accordance with a single-master communication protocol. The multiple master devices are respectively configured to communicate with the slave device in accordance with the single-master communication protocol. The logic circuitry, which is disposed respectively in the multiple master devices, is configured to exchange control signals indicative of whether the slave device is available for access, so as to prevent simultaneous access attempts to the slave device by more than one of the master devices.
    Type: Application
    Filed: May 21, 2018
    Publication date: June 6, 2019
    Inventors: Manfred Kunz, Markus Fischer
  • Patent number: 9357457
    Abstract: A wireless device for wireless communication in a wireless area network. The wireless device includes a main radio channel for exchanging data with an access point in the wireless area network, as well as an auxiliary radio channel for scanning for availability of other access points in the wireless area network.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: May 31, 2016
    Assignee: Marvell International Ltd.
    Inventors: Manfred Kunz, Joachim Schmalz
  • Patent number: 9066246
    Abstract: A data recognition system for a wireless device that includes a storage module that stores a first hash value and a processing module that generates a second hash value based on an incoming data stream received by the wireless device and detects a change in the incoming data stream based on a comparison between the first hash value with the second hash value.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: June 23, 2015
    Assignee: Marvell International Ltd.
    Inventors: Joachim Schmalz, Manfred Kunz
  • Patent number: 8630255
    Abstract: A wireless device for wireless communication in a wireless area network. The wireless device includes a main radio channel for exchanging data with an access point in the wireless area network, as well as an auxiliary radio channel for scanning for availability of other access points in the wireless area network.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: January 14, 2014
    Assignee: Marvell International Ltd.
    Inventors: Manfred Kunz, Joachim Schmalz
  • Patent number: 8351343
    Abstract: A data recognition system for a wireless device that includes a storage module that stores a first hash value and a processing module that generates a second hash value based on an incoming data stream received by the wireless device and detects a change in the incoming data stream based on a comparison between the first hash value with the second hash value.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: January 8, 2013
    Assignee: Marvell International Ltd.
    Inventors: Joachim Schmalz, Manfred Kunz
  • Patent number: 7920536
    Abstract: In a wireless network having one or more base stations and one or more access points, the base station is switched automatically from a CSMA/CA exchange protocol to an RTS/CTS exchange protocol, in a case where the base station infers the presence of a hidden node. The presence of a hidden node is inferred by scanning frames of wireless network transmissions to and from other base stations and the access point. In a case where there is a discrepancy in the accrued frames, such that frames have been accrued from the access point to a second base station without also accruing frames from the second base station back to the access point, the presence of a hidden node is inferred, and the base station is switched automatically to RTS/CTS exchange mode.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: April 5, 2011
    Assignee: Marvell International Ltd.
    Inventors: Manfred Kunz, Joachim Schmalz
  • Patent number: 7881185
    Abstract: A network device includes a first plurality of ports and a first plurality of communication links. Each port of the first plurality of ports communicates with a corresponding communication link of the first plurality of communication links. An adapter aggregates the first plurality communication links into a second plurality of aggregated links. The adaptor assigns a single media access control address to each aggregated link of the second plurality of aggregated links. A driver selects a first aggregated link of the second plurality of aggregated links as an active link based on a link quality of the first aggregated link. The driver sends and receives data over the first aggregated link using the single media access control address assigned to the first aggregated link. The driver selects a second aggregated link of the second plurality of aggregated links as the active link in response to the link quality of the first aggregated link being less than a link quality of the second aggregated link.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: February 1, 2011
    Assignee: Marvell International Ltd.
    Inventors: Michael Karl, Thomas Ruf, Manfred Kunz, Joachim Schmalz
  • Patent number: 7529180
    Abstract: A network device, method and computer program product for communicating data over aggregated links, wherein each of the aggregated links comprises a plurality of data communication links. The network device comprises n ports; and a processor to determine a link quality for each of m of the aggregated links, wherein m?2, wherein each of the m aggregated links comprises a preselected plurality p of the n ports, select one of the m aggregated links based on the link quality determined for each of the m aggregated links, and send the data over the selected one of the m aggregated links.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: May 5, 2009
    Assignee: Marvell International Ltd.
    Inventors: Michael Karl, Thomas Ruf, Manfred Kunz, Joachim Schmalz
  • Patent number: 7441743
    Abstract: A fastening arrangement of a machine base (8) of a machine on foundations (1). The fastening arrangement includes a foundation recess (3), filled with concrete (71, 72) and having an inner anchor shank (4), a foundation plate (2) of steel on the foundation (1), the machine base (8) on the foundation plate (2), an anti-fatigue bolt/stud bolt (9) restraining the machine against the foundation (1), the anti-fatigue bolt/stud bolt (9) being screwed into the anchor shank (4). The anchor shank (4) has at least two threaded disks (5) arranged offset from one another. The anti-fatigue bolt/stud bolt (9) screwed into the anchor shank (4) is passed through the foundation plate (2) and the machine base (8).
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: October 28, 2008
    Assignee: ALSTOM Technology Ltd.
    Inventors: Thomas Behlinger, Manfred Kunz, Thomas Olive, Michael Lukas Don Yong Prochazka
  • Publication number: 20040261340
    Abstract: A fastening arrangement of a machine base (8) of a machine on foundations (1). The fastening arrangement includes a foundation recess (3), filled with concrete (71, 72) and having an inner anchor shank (4), a foundation plate (2) of steel on the foundation (1), the machine base (8) on the foundation plate (2), an anti-fatigue bolt/stud bolt (9) restraining the machine against the foundation (1), the anti-fatigue bolt/stud bolt (9) being screwed into the anchor shank (4). The anchor shank (4) has at least two threaded disks (5) arranged offset from one another. The anti-fatigue bolt/stud bolt (9) screwed into the anchor shank (4) is passed through the foundation plate (2) and the machine base (8).
    Type: Application
    Filed: June 28, 2004
    Publication date: December 30, 2004
    Inventors: Thomas Behlinger, Manfred Kunz, Thomas Olive, Michael Lukas Dong Yong Prochazka
  • Patent number: 4809555
    Abstract: A pressure sensor has a metal housing. The housing has a closed-off and fluid-filled pressure space. A diaphragm partitions the pressure space off from the environment and transmits pressures derived therefrom to the fluid. A pressure-sensitive chip of semiconducting material is exposed to the pressure of the fluid and has a piezoresistant and anisotropic effect. Connectors, metal rods for instance, extend pressure-tight and electrically insulated from the metal housing into the pressure space. The connectors can be connected to an electric processing circuit. The pressure-sensitive chip is connected by bonds. To provide a pressure sensor that will be cheaper to manufacture, less sensitive to malfunction, and more precise, the pressure sensor is provided with a base plate of aluminum nitride. At least some areas of its surface are metallized. The pressure-sensitive chip is soldered to the base plate within a metallized area.
    Type: Grant
    Filed: September 3, 1986
    Date of Patent: March 7, 1989
    Inventor: Manfred Kunz