Patents by Inventor Manickam MUTHIAH

Manickam MUTHIAH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12321248
    Abstract: A method and system for generating an activity report for testbench components in a test environment is disclosed. In some embodiments, the method includes retrieving a unique ID associated with each of a plurality of registered testbench components. The method further includes selectively configuring the ATU associated with one or more testbench components from the plurality of registered testbench components to generate an activity tracking report at an end of a simulation, based on a user requirement. The method further includes fetching the activity tracking report corresponding to the one or more testbench components based on the associated unique ID. The method further includes generating a summarized activity report corresponding to the one or more testbench components based on the activity tracking report received from the respective ATU. The method further includes rendering at least one of the activity tracking report and the summarized activity report to a user.
    Type: Grant
    Filed: June 15, 2023
    Date of Patent: June 3, 2025
    Inventors: Manickam Muthiah, Karthikeyan Keelapandal Sundaram, Nisha Ravichandran, Sathish Kumar Krishnamoorthy, Razi Abdul Rahim
  • Patent number: 12299367
    Abstract: This disclosure relates to system and method for generating an encapsulated error signature during functional simulation. The method includes receiving at least one error descriptor notification message from at least one of a plurality of testbench components. Each of the at least one error descriptor notification message includes values corresponding to a plurality of error attributes including error ranking, error code, error message, and error score. The method further includes iteratively updating in real-time, a plurality of arrays based on values corresponding to one or more of the plurality of error attributes, in response to receiving each of the at least one error descriptor notification message. The method further includes iteratively generating in real-time, an encapsulated error signature based on each of the error ranking, the error code, and an error count associated with the error code derived from one or more of the plurality of arrays.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: May 13, 2025
    Inventors: Manickam Muthiah, Razi Abdul Rahim
  • Publication number: 20250093415
    Abstract: A method and system for performing actions through testbench components present within a test environment based on a testing context is disclosed. The method includes sending, by each of a plurality of testbench components to an actions controller, an associated controllable actions packet, wherein the controllable actions packet comprises a list of controllable actions corresponding to a testbench component. The method further includes receiving, by each of the plurality of testbench components from the actions controller, an associated context-based actions control packet in response to sending. The method includes configuring each of the plurality of testbench components based on the associated context-based actions control packet. The method further includes performing, by each of the plurality of testbench components, the one or more actions present within the associated context-based actions control packet.
    Type: Application
    Filed: November 29, 2024
    Publication date: March 20, 2025
    Inventors: MANICKAM MUTHIAH, KARTHIKEYAN KEELAPANDAL SUNDARAM, NISHA RAVICHANDRAN, SATHISH KUMAR KRISHNAMOORTHY, RAZI ABDUL RAHIM
  • Patent number: 12188983
    Abstract: A method and system for controlling actions of testbench components present within a test environment based on a testing context is disclosed. In some embodiments, the method includes receiving a controllable actions packet from each of a plurality of testbench components in the test environment; parsing a testing context associated with a test sequence; generating a context-based actions control packet for each of the plurality of testbench components, based on the testing context metadata and the list of controllable actions corresponding to each of the plurality of testbench components; and transmitting the context-based actions control packet to an associated testbench component of the plurality of testbench components.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: January 7, 2025
    Inventors: Manickam Muthiah, Karthikeyan Keelapandal Sundaram, Nisha Ravichandran, Sathish Kumar Krishnamoorthy, Razi Abdul Rahim
  • Publication number: 20240418774
    Abstract: A method and system for controlling actions of testbench components present within a test environment based on a testing context is disclosed. In some embodiments, the method includes receiving a controllable actions packet from each of a plurality of testbench components in the test environment; parsing a testing context associated with a test sequence; generating a context-based actions control packet for each of the plurality of testbench components, based on the testing context metadata and the list of controllable actions corresponding to each of the plurality of testbench components; and transmitting the context-based actions control packet to an associated testbench component of the plurality of testbench components.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 19, 2024
    Inventors: MANICKAM MUTHIAH, KARTHIKEYAN KEELAPANDAL SUNDARAM, NISHA RAVICHANDRAN, SATHISH KUMAR KRISHNAMOORTHY, RAZI ABDUL RAHIM
  • Publication number: 20240418778
    Abstract: A method for simultaneously testing multiple Device Under Test (DUT) internal blocks is disclosed. The method includes receiving by a reconfigurable internal buffer of a DUT, an input stimulus corresponding to at least one of a plurality of DUT internal blocks; selecting, via a control register, one or more DUT internal blocks from the plurality of DUT internal blocks to perform testing based on the input stimulus. The method to select the one or more DUT internal blocks includes enabling control bits of at least one multiplexer associated with the one or more DUT internal blocks. The method includes sending, by the reconfigurable internal buffer, the input stimulus corresponding to each of the one or more DUT internal blocks; testing the one or more DUT internal blocks based on the corresponding input stimulus; and generating, by each of the one or more DUT internal blocks, a corresponding output.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 19, 2024
    Inventors: MANICKAM MUTHIAH, KARTHIKEYAN KEELAPANDAL SUNDARAM, RAZI Abdul Rahim
  • Publication number: 20240418775
    Abstract: A method for tracking and managing activities of testbench components in a test environment during a simulation is disclosed. In some embodiments, the method includes receiving a first Activity Tracking Unit (ATU) message from an ATU pre-installed within each of a plurality of testbench components. The method further includes registering each of the plurality of testbench components in response to receiving the first ATU message from the corresponding ATU. The method further includes selecting one or more configuration settings corresponding to the ATU of each of the plurality of testbench components based on one or more user requirements. The method further includes receiving at least one second ATU message from the corresponding ATU based on the one or more configuration settings, at an end of the simulation. The method further includes utilizing the at least one second ATU message to drive one or more outcomes corresponding to the simulation.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 19, 2024
    Inventors: MANICKAM MUTHIAH, KARTHIKEYAN KEELAPANDAL SUNDARAM, NISHA RAVICHANDRAN, SATHISH KUMAR KRISHNAMOORTHY, RAZI ABDUL RAHIM
  • Publication number: 20240419565
    Abstract: A method and system for generating an activity report for testbench components in a test environment is disclosed. In some embodiments, the method includes retrieving a unique ID associated with each of a plurality of registered testbench components. The method further includes selectively configuring the ATU associated with one or more testbench components from the plurality of registered testbench components to generate an activity tracking report at an end of a simulation, based on a user requirement. The method further includes fetching the activity tracking report corresponding to the one or more testbench components based on the associated unique ID. The method further includes generating a summarized activity report corresponding to the one or more testbench components based on the activity tracking report received from the respective ATU. The method further includes rendering at least one of the activity tracking report and the summarized activity report to a user.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 19, 2024
    Inventors: MANICKAM MUTHIAH, KARTHIKEYAN KEELAPANDAL SUNDARAM, NISHA RAVICHANDRAN, SATHISH KUMAR KRISHNAMOORTHY, RAZI ABDUL RAHIM
  • Patent number: 12081428
    Abstract: A method for identifying locked-up simulation testbench components during a simulation is disclosed. In some embodiments, the method includes creating, by an initiator simulation testbench component, at least one migrant packet. The method further includes circulating, during a component identification cycle, each of the at least one migrant packet in an associated predefined direction through each of the plurality of simulation testbench components in the associated daisy loop from the at least one daisy loop. The method further includes circulating, during an issue identification cycle, each of the least one migrant packet in the associated predefined direction through each of the plurality of simulation testbench components in the associated daisy loop.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: September 3, 2024
    Inventors: Manickam Muthiah, Rohit Kumar, Shashank Nafde, Razi Abdul Rahim
  • Publication number: 20240232458
    Abstract: A method for analysing simulation data is disclosed. In some embodiments, the method includes creating a set of data extract files from simulation logs associated with a current simulation run. The method further includes generating a unique signature for each of the set of data extract files. The method further includes creating a signature log file comprising the unique signature generated for each of the set of data extract files. The method further includes generating a consolidated signature for the signature log file. The method further includes comparing the consolidated signature with a prior consolidated signature generated for a prior simulation run. The method further includes determining whether the current simulation run deviates from the prior simulation run, based on the comparison between the consolidated signature and the prior consolidated signature.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 11, 2024
    Inventors: MANICKAM MUTHIAH, KARTHIKEYAN KEELAPANDAL SUNDARAM, NISHA RAVICHANDRAN, RAZI ABDUL RAHIM
  • Publication number: 20230421477
    Abstract: A method for generating a simulation timeline encoded packets view is disclosed. In some embodiments, the method includes receiving a type string from each of a plurality of simulation testbench components. The method further includes assigning a unique type code to each of the plurality of simulation testbench components based on the type string. The method further includes iteratively receiving from at least one of the plurality of simulation testbench components, a plurality of data strings along with the corresponding assigned unique type code. The method further includes storing each of the plurality of data strings marked with an associated receipt timestamp. The method further includes contemporaneously generating at each iteration, a simulation timeline encoded packets view for each of the plurality of simulation testbench components. The method further includes contemporaneously rendering at each iteration the simulation timeline encoded packets view via a Graphical User Interface (GUI).
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: MANICKAM MUTHIAH, NISHA RAVICHANDRAN, RAZI ABDUL RAHIM, Gunamani Rajagopal
  • Publication number: 20230418728
    Abstract: A method for generating a real-time test environment activity view for a functional simulation is disclosed. In some embodiments, the method includes retrieving a unique identifier (ID) associated with each of a plurality of testbench components present in a test environment from a real-time test environment activity viewer log file. The method further includes iteratively fetching from the real-time test environment activity viewer log file, a set of information corresponding to an activity associated with each of the plurality of testbench components based on the associated unique ID. The method further includes contemporaneously generating at each iteration, a real-time test environment activity view for each of the plurality of testbench components based on the associated set of information. The method further includes contemporaneously rendering at each iteration, the real-time test environment activity view for each of the plurality of testbench components via a Graphical User Interface (GUI).
    Type: Application
    Filed: June 24, 2022
    Publication date: December 28, 2023
    Inventors: MANICKAM MUTHIAH, SELVIN ISAAC PANDIAN, RAZI ABDUL RAHIM
  • Publication number: 20230419007
    Abstract: This disclosure relates to system and method for generating an encapsulated error signature during functional simulation. The method includes receiving at least one error descriptor notification message from at least one of a plurality of testbench components. Each of the at least one error descriptor notification message includes values corresponding to a plurality of error attributes including error ranking, error code, error message, and error score. The method further includes iteratively updating in real-time, a plurality of arrays based on values corresponding to one or more of the plurality of error attributes, in response to receiving each of the at least one error descriptor notification message. The method further includes iteratively generating in real-time, an encapsulated error signature based on each of the error ranking, the error code, and an error count associated with the error code derived from one or more of the plurality of arrays.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: MANICKAM MUTHIAH, Razi Abdul Rahim
  • Patent number: 11797409
    Abstract: A method for managing transactions burstiness associated with a sequence of transactions generated in a test environment for verifying a Device Under Test (DUT) is disclosed. In some embodiments, the method includes processing a plurality of signals associated with a sequence of transactions. The method further includes generating a transactions burstiness signature representative of the sequence of transactions based on processing a set of signals from the plurality of signals. The method further includes analysing the transactions burstiness signature to identify at least one pattern of interest. The method further includes iteratively providing an input comprising at least one missing pattern of interest. The method further includes iteratively generating a subsequent sequence of transactions and a subsequent transactions burstiness signature associated with the subsequent sequence of transactions.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: October 24, 2023
    Inventors: Manickam Muthiah, Razi Abdul Rahim
  • Publication number: 20230315936
    Abstract: This disclosure relates to method and system for representing functional simulation performance for a plurality of simulations in real-time using Graphical User Interface (GUI) elements. For each of the plurality of simulations in a verification environment and upon completing each of a plurality of simulation intervals, the method includes determining a simulation performance value for a simulation interval based on wall clock time lapsed during completion of the simulation interval; calculating, in real-time, an average simulation performance value based on a sum of the simulation performance value corresponding to each of completed simulation intervals from the plurality of simulation intervals; estimating an additional wall clock time required to complete remaining of the plurality of simulation intervals using the average simulation performance value; and updating a special log file with a set of simulation parameters.
    Type: Application
    Filed: April 4, 2022
    Publication date: October 5, 2023
    Inventors: MANICKAM MUTHIAH, SATHISH KUMAR KRISHNAMOORTHY, Razi Abdul Rahim
  • Publication number: 20230269163
    Abstract: A method for identifying locked-up simulation testbench components during a simulation is disclosed. In some embodiments, the method includes creating, by an initiator simulation testbench component, at least one migrant packet. The method further includes circulating, during a component identification cycle, each of the at least one migrant packet in an associated predefined direction through each of the plurality of simulation testbench components in the associated daisy loop from the at least one daisy loop. The method further includes circulating, during an issue identification cycle, each of the least one migrant packet in the associated predefined direction through each of the plurality of simulation testbench components in the associated daisy loop.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Inventors: Manickam Muthiah, Rohit Kumar, Shashank Nafde, Razi Abdul Rahim
  • Patent number: 11683258
    Abstract: A method for off-loading streams selection to generate organized concurrent streams in a simulation environment is disclosed. In some embodiments, the method includes receiving at least one stream selection request for a DUT from a DUT input generator; performing a stream selection process in response to receiving the request. In order to perform the stream selection process, the method includes analyzing each of a plurality of stream specification entries of a stream specification entries array; selecting a stream from the plurality of streams based on one or more of the set of stream specification entry fields associated with the stream; and generating a stream selection result object based on the selected stream; sending the stream selection result object associated with the selected stream to a respective DUT input generator; and utilizing, by the respective DUT input generator, the stream selection result object associated with the selected stream.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: June 20, 2023
    Assignee: HCL America Inc.
    Inventors: Manickam Muthiah, Rohit Kumar, Shashank Nafde, Razi Abdul Rahim
  • Patent number: 11295051
    Abstract: The present disclosure relates to system(s) and method(s) for interactively controlling the course of a functional simulation of DUV/SUV. The system comprises a testbench and the DUV/SUV connected to the testbench. The testbench generates a set of input data/packets as a stimulus to be processed by the DUV/SUV. The set of input data/packets is generated to simulate and verify the DUV/SUV. Further, the testbench identifies a pre-defined event at runtime during the simulation. Upon identification of the event, the testbench is configured to pause the simulation and transmit a notification message to a user indicating the occurrence of the event. Further, the testbench waits for a pre-defined time interval to receive one or more user inputs. The testbench further generates new stimulus based on the one or more user inputs and resumes the paused simulation with the new stimulus, thereby controlling the course of the functional simulation.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: April 5, 2022
    Assignee: HCL Technologies Limited
    Inventors: Manickam Muthiah, Jabeer Ahamed Mohammed Nowshath, Sathish Kumar Krishnamoorthy
  • Patent number: 11249135
    Abstract: Disclosed is a system for providing an inference associated with delays in processing input data packet(s) by a Design Under Verification (DUV)/System Under Verification (SUV) characterized by maintaining timing information of the input data packet(s) is disclosed. To provide an inference, initially, an input data packet is processed by a DUV or SUV. Simultaneously, an expected data packet corresponding to the input data packet is predicted and a Unique Identifier is assigned to the expected data packet corresponding to the input data packet that entered into the DUV/SUV. After assigning the Unique Identifier, the plurality of data fields pertaining to the Unique Identifier are populated in an array of Packet Timing Entries based on a Delay Identifier (ID) and a Delay Mode. The plurality of data fields may then be used for reporting various delay statistics and operational behaviour of DUV/SUV.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: February 15, 2022
    Assignee: HCL Technologies Limited
    Inventors: Manickam Muthiah, Sathish Kumar Krishnamoorthy
  • Publication number: 20210116502
    Abstract: Disclosed is a system for providing an inference associated with delays in processing input data packet(s) by a Design Under Verification (DUV)/System Under Verification (SUV) characterized by maintaining timing information of the input data packet(s) is disclosed. To provide an inference, initially, an input data packet is processed by a DUV or SUV. Simultaneously, an expected data packet corresponding to the input data packet is predicted and a Unique Identifier is assigned to the expected data packet corresponding to the input data packet that entered into the DUV/SUV. After assigning the Unique Identifier, the plurality of data fields pertaining to the Unique Identifier are populated in an array of Packet Timing Entries based on a Delay Identifier (ID) and a Delay Mode. The plurality of data fields may then be used for reporting various delay statistics and operational behaviour of DUV/SUV.
    Type: Application
    Filed: September 29, 2020
    Publication date: April 22, 2021
    Inventors: Manickam MUTHIAH, Sathish Kumar KRISHNAMOORTHY