Patents by Inventor Manikandan R

Manikandan R has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12149248
    Abstract: In described examples of an integrated circuit (IC), an oscillator includes Schmitt trigger delay cells connected in a ring topology. The Schmitt trigger delay cells have a high input threshold approximately equal to Vdd and a low input threshold approximately equal to Vss to increase delay through each cell. An output buffer receives a phase signal from an output terminal of one of the Schmitt trigger delay cells and converts a transition phase signal to a faster transition clock signal. The output buffer has control circuitry that generates non-overlapping control signals in response to the phase signal, to control an output stage to generate the fast transition clock signal while preventing short circuit current in the output stage.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: November 19, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Manikandan R R
  • Publication number: 20230289597
    Abstract: The present disclosure relates to a method and a system for generating secondary tasks for neural networks. The method comprises receiving a feature set related to each of multiple data items, which are generated for a primary task. Further, the method comprises determining an association score between each of the features of a data item with each of the features of other data items. Furthermore, the method comprises identifying a first set of features by comparing the association score with a threshold value. The association score must be greater than the threshold value for the features to be included in the first set of features. Moreover, the method comprises identifying secondary features by mapping the first set of features with the feature set. Thereafter, the method comprises generating secondary tasks based on the secondary features for a neural network.
    Type: Application
    Filed: February 17, 2023
    Publication date: September 14, 2023
    Applicant: HITACHI, LTD.
    Inventors: Manikandan R, Yuichi Nonaka, Kingshuk Banerjee, Shibashish Sen
  • Publication number: 20220294426
    Abstract: In described examples of an integrated circuit (IC), an oscillator includes Schmitt trigger delay cells connected in a ring topology. The Schmitt trigger delay cells have a high input threshold approximately equal to Vdd and a low input threshold approximately equal to Vss to increase delay through each cell. An output buffer receives a phase signal from an output terminal of one of the Schmitt trigger delay cells and converts a transition phase signal to a faster transition clock signal. The output buffer has control circuitry that generates non-overlapping control signals in response to the phase signal, to control an output stage to generate the fast transition clock signal while preventing short circuit current in the output stage.
    Type: Application
    Filed: May 31, 2022
    Publication date: September 15, 2022
    Inventor: Manikandan R R
  • Patent number: 11349456
    Abstract: In described examples of an integrated circuit (IC), an oscillator includes Schmitt trigger delay cells connected in a ring topology. The Schmitt trigger delay cells have a high input threshold approximately equal to Vdd and a low input threshold approximately equal to Vss to increase delay through each cell. An output buffer receives a phase signal from an output terminal of one of the Schmitt trigger delay cells and converts a transition phase signal to a faster transition clock signal. The output buffer has control circuitry that generates non-overlapping control signals in response to the phase signal, to control an output stage to generate the fast transition clock signal while preventing short circuit current in the output stage.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: May 31, 2022
    Assignee: Texas Instruments Incorporated
    Inventor: Manikandan R R
  • Publication number: 20190028089
    Abstract: In described examples of an integrated circuit (IC), an oscillator includes Schmitt trigger delay cells connected in a ring topology. The Schmitt trigger delay cells have a high input threshold approximately equal to Vdd and a low input threshold approximately equal to Vss to increase delay through each cell. An output buffer receives a phase signal from an output terminal of one of the Schmitt trigger delay cells and converts a transition phase signal to a faster transition clock signal. The output buffer has control circuitry that generates non-overlapping control signals in response to the phase signal, to control an output stage to generate the fast transition clock signal while preventing short circuit current in the output stage.
    Type: Application
    Filed: April 20, 2018
    Publication date: January 24, 2019
    Inventor: Manikandan R R
  • Publication number: 20180032695
    Abstract: The present disclosure relates to the field of clinical care plan for patients. More particularly, the present disclosure relates to a method and system for determining plausibility of clinical care plan. The present disclosure checks for plausibility of the clinical care plan determining plausibility of each clinical action in the action plan. The plausibility of a current clinical action is determined by comparing the quantitative factors and its corresponding quantitative values associated with the current clinical action with the quantitative factors and the corresponding quantitative values of the previous clinical action. In the present disclosure, the effects of previous clinical actions are considered for determining plausibility of the current clinical action and hence provide an effective mechanism for determining plausibility of the overall clinical care plan. The present invention substantially reduces the time for determining plausibility of clinical care plan since it is an automated process.
    Type: Application
    Filed: July 20, 2017
    Publication date: February 1, 2018
    Applicant: HITACHI, LTD.
    Inventors: Manikandan R, Sarath P R, Saima MOHAN