Patents by Inventor Manindra Parhy
Manindra Parhy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11928826Abstract: In various examples, optical flow estimate (OFE) quality is improved when employing a hint-based algorithm in multi-level hierarchical motion estimation by using different scan orders at different resolution levels. A scan of an image performed with a scan order may initially leverage OFEs from a previous scan of the image, where the previous scan was performed using a different scan order. The OFEs leveraged from the previous scan are more likely to be of high accuracy until sufficient spatial hints are available to the hint-based algorithm for the scan to reduce the impact of potentially lower quality OFEs resulting from the different scan order of the previous scan.Type: GrantFiled: November 15, 2021Date of Patent: March 12, 2024Assignee: NVIDIA CorporationInventors: Dong Zhang, Jianjun Chen, Manindra Parhy
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Publication number: 20220076429Abstract: In various examples, optical flow estimate (OFE) quality is improved when employing a hint-based algorithm in multi-level hierarchical motion estimation by using different scan orders at different resolution levels. A scan of an image performed with a scan order may initially leverage OFEs from a previous scan of the image, where the previous scan was performed using a different scan order. The OFEs leveraged from the previous scan are more likely to be of high accuracy until sufficient spatial hints are available to the hint-based algorithm for the scan to reduce the impact of potentially lower quality OFEs resulting from the different scan order of the previous scan.Type: ApplicationFiled: November 15, 2021Publication date: March 10, 2022Inventors: Dong Zhang, Jianjun Chen, Manindra Parhy
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Patent number: 11176682Abstract: In various examples, optical flow estimate (OFE) quality is improved when employing a hint-based algorithm in multi-level hierarchical motion estimation by using different scan orders at different resolution levels. A scan of an image performed with a scan order may initially leverage OFEs from a previous scan of the image, where the previous scan was performed using a different scan order. The OFEs leveraged from the previous scan are more likely to be of high accuracy until sufficient spatial hints are available to the hint-based algorithm for the scan to reduce the impact of potentially lower quality OFEs resulting from the different scan order of the previous scan.Type: GrantFiled: November 27, 2019Date of Patent: November 16, 2021Assignee: NVIDIA CorporationInventors: Dong Zhang, Jianjun Chen, Manindra Parhy
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Publication number: 20210158539Abstract: In various examples, optical flow estimate (OFE) quality is improved when employing a hint-based algorithm in multi-level hierarchical motion estimation by using different scan orders at different resolution levels. A scan of an image performed with a scan order may initially leverage OFEs from a previous scan of the image, where the previous scan was performed using a different scan order. The OFEs leveraged from the previous scan are more likely to be of high accuracy until sufficient spatial hints are available to the hint-based algorithm for the scan to reduce the impact of potentially lower quality OFEs resulting from the different scan order of the previous scan.Type: ApplicationFiled: November 27, 2019Publication date: May 27, 2021Inventors: Dong Zhang, Jianjun Chen, Manindra Parhy
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Publication number: 20150117536Abstract: AVC decoding techniques include parsing a set of alternating slices of one or more picture frames and parsing another set of alternating slices of the one or more picture frames. The parsed set of alternating slices of the one or more picture frames are buffered separately from the parsed other set of alternating slices of the one or more picture frames. The buffered parsed set of alternating slices and the other buffered parsed set of alternating slices are alternating decoded.Type: ApplicationFiled: October 30, 2013Publication date: April 30, 2015Applicant: Nvidia CorporationInventors: Xinyang YU, Olivier LAPICQUE, Xiaohua YANG, Jincheng LI, Manindra PARHY
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Patent number: 8897365Abstract: A system for executing video encoding operations. The system includes a video encoder for encoding an incoming video stream into a plurality of macro blocks. A motion estimation engine is coupled to the video encoder for controlling the encoding of the macro blocks. A video rate control processor is coupled to the video encoder and coupled to the motion estimation engine. The video rate control processor receives a plurality of parameters from the video encoder that indicate an encoding complexity for a macro block and a video frame of the video stream and, upon receiving an indication from the motion estimation engine, computes a quantization parameter for the macro block. The quantization parameter is dynamically adjusted for the video stream to achieve a target bit rate.Type: GrantFiled: November 19, 2008Date of Patent: November 25, 2014Assignee: Nvidia CorporationInventors: Harikrishna Madadi Reddy, Himadri Choudhury, Manindra Parhy, Liang Cheng
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Patent number: 8831099Abstract: Non-encoded data for a macroblock of an image frame is accessed. A cost to intra-encode the macroblock is computed using at least a portion of the non-encoded data in place of reconstructed image data from another macroblock of the image frame. The cost can be compared against the cost to inter-encode the first macroblock in order to select how the first macroblock is to be encoded.Type: GrantFiled: December 17, 2008Date of Patent: September 9, 2014Assignee: Nvidia CorporationInventors: Manindra Parhy, Atul Garg, Prahlad Venkatapuram, Chung-Cheng Lou, Ignatius Tjandrasuwita
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Publication number: 20140126637Abstract: A system and a method for decoding a video is disclosed by the present invention. The system comprises a controller, a parser and a decoder, wherein the controller is used for sending a control command to the parser and receiving a status report from the parser; the parser is used for parsing a video stream according to the control command and sending a parsed result to the decoder; and the decoder is used for decoding the parsed result. By using the system and the method for decoding a video provided by the present invention, errors in a video stream can be concealed during the decoding process of the video, and then a desired video output effect can be achieved at a receiving end.Type: ApplicationFiled: January 18, 2013Publication date: May 8, 2014Applicant: NVIDIA CORPORATIONInventors: XINYANG YU, JINCHENG LI, JINYUE LU, MANINDRA PARHY
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Patent number: 8666181Abstract: The present invention facilitates efficient and effective detection of pixel alteration. In one embodiment a pixel alteration analysis system includes a difference summing multiple engine component and a control component. The difference summing multiple engine component determines the sum of differences between pixel values in a plurality of pixels. The control component determines an indication of motion based upon said relationship of said pixels in said plurality of pixels. In one exemplary implementation, the difference in values corresponds to a relationship between values of pixels in a block of pixels at different frames. The number and configuration of pixels in a block partition can be flexibly changed.Type: GrantFiled: December 10, 2008Date of Patent: March 4, 2014Assignee: Nvidia CorporationInventors: Prahlad Venkatapuram, Atul Garg, Karunakar Rachamreddy, Visalakshi Vaduganathan, Manindra Parhy, Ignatius Tjandrasuwita
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Publication number: 20100150237Abstract: Non-encoded data for a macroblock of an image frame is accessed. A cost to intra-encode the macroblock is computed using at least a portion of the non-encoded data in place of reconstructed image data from another macroblock of the image frame. The cost can be compared against the cost to inter-encode the first macroblock in order to select how the first macroblock is to be encoded.Type: ApplicationFiled: December 17, 2008Publication date: June 17, 2010Applicant: NVIDIA CorporationInventors: Manindra Parhy, Atul Garg, Prahlad Venkatapuram, Chung-Cheng Lou, Ignatius Tjandrasuwita
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Publication number: 20100142761Abstract: The present invention facilitates efficient and effective detection of pixel alteration. In one embodiment a pixel alteration analysis system includes a difference summing multiple engine component and a control component. The difference summing multiple engine component determines the sum of differences between pixel values in a plurality of pixels. The control component determines an indication of motion based upon said relationship of said pixels in said plurality of pixels. In one exemplary implementation, the difference in values corresponds to a relationship between values of pixels in a block of pixels at different frames. The number and configuration of pixels in a block partition can be flexibly changed.Type: ApplicationFiled: December 10, 2008Publication date: June 10, 2010Applicant: NVIDIA CORPORATIONInventors: Prahlad Venkatapuram, Atul Garg, Karunakar Rachamreddy, Visalakshi Vaduganathan, Manindra Parhy, Ignatius Tjandrasuwita
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Publication number: 20100124279Abstract: A system for executing video encoding operations. The system includes a video encoder for encoding an incoming video stream into a plurality of macro blocks. A motion estimation engine is coupled to the video encoder for controlling the encoding of the macro blocks. A video rate control processor is coupled to the video encoder and coupled to the motion estimation engine. The video rate control processor receives a plurality of parameters from the video encoder that indicate an encoding complexity for a macro block and a video frame of the video stream and, upon receiving an indication from the motion estimation engine, computes a quantization parameter for the macro block. The quantization parameter is dynamically adjusted for the video stream to achieve a target bit rate.Type: ApplicationFiled: November 19, 2008Publication date: May 20, 2010Applicant: NVIDIA CORPORATIONInventors: Harikrishna Madadi Reddy, Himadri Choudhury, Manindra Parhy, Liang Cheng
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Publication number: 20040081238Abstract: An asymmetric layout is provided to partition a target macroblock of a target frame of a video image data into a plurality of sub-blocks. At least one of the plurality of sub-blocks has different amount of pixels than others of the plurality of sub-blocks. For each of the plurality of sub-blocks of the target macroblock, a search is conducted for a matched block having the least differences within a search area of a reference frame of the video image data.Type: ApplicationFiled: October 25, 2002Publication date: April 29, 2004Inventor: Manindra Parhy