Patents by Inventor Manish Kadam
Manish Kadam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12223187Abstract: The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event, The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.Type: GrantFiled: May 10, 2023Date of Patent: February 11, 2025Assignee: Kioxia CorporationInventors: Saswati Das, Manish Kadam
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Patent number: 11977773Abstract: A method performed by a controller of a solid-state drive (SSD) comprising splitting a logical to physical mapping table in a non-volatile semiconductor memory device of the SSD into a plurality of regions, each of the regions associated with a plurality of logical cluster addresses (LCAs), determining if the mapping table for each region contains an entry with a valid address, setting a validity status in a validity bit for a region of the plurality of regions if the mapping table for the region contains any mapped addresses, and storing the validity bit for each region in a validity bitmap table (VBT).Type: GrantFiled: September 30, 2021Date of Patent: May 7, 2024Assignee: KIOXIA CORPORATIONInventors: Saswati Das, Manish Kadam
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Patent number: 11797452Abstract: Various implementations described herein relate to systems and methods for dynamically managing buffers of a storage device, including receiving, by a controller of the storage device from a host, information indicative of a frequency by which data stored in the storage device is accessed, and in response to receiving the information determining, by the controller, the order by which read buffers of the storage device are allocated for a next read command. The NAND read count of virtual Word-Lines (WLs) are also used to cache more frequently accessed WLs, thus proactively reducing read disturb and consequently increasing NAND reliability and NAND life.Type: GrantFiled: July 18, 2022Date of Patent: October 24, 2023Assignee: KIOXIA CORPORATIONInventors: Saswati Das, Manish Kadam, Neil Buxton
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Publication number: 20230273734Abstract: The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event, The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.Type: ApplicationFiled: May 10, 2023Publication date: August 31, 2023Inventors: Saswati DAS, Manish KADAM
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Patent number: 11669254Abstract: The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event. The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.Type: GrantFiled: September 30, 2021Date of Patent: June 6, 2023Assignee: Kioxia CorporationInventors: Saswati Das, Manish Kadam
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Publication number: 20230096420Abstract: A method performed by a controller of a solid-state drive (SSD) comprising splitting a logical to physical mapping table in a non-volatile semiconductor memory device of the SSD into a plurality of regions, each of the regions associated with a plurality of logical cluster addresses (LCAs), determining if the mapping table for each region contains an entry with a valid address, setting a validity status in a validity bit for a region of the plurality of regions if the mapping table for the region contains any mapped addresses, and storing the validity bit for each region in a validity bitmap table (VBT).Type: ApplicationFiled: September 30, 2021Publication date: March 30, 2023Inventors: Saswati DAS, Manish KADAM
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Publication number: 20230095644Abstract: The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event, The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.Type: ApplicationFiled: September 30, 2021Publication date: March 30, 2023Inventors: Saswati DAS, Manish KADAM
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Publication number: 20220350746Abstract: Various implementations described herein relate to systems and methods for dynamically managing buffers of a storage device, including receiving, by a controller of the storage device from a host, information indicative of a frequency by which data stored in the storage device is accessed, and in response to receiving the information determining, by the controller, the order by which read buffers of the storage device are allocated for a next read command. The NAND read count of virtual Word-Lines (WLs) are also used to cache more frequently accessed WLs, thus proactively reducing read disturb and consequently increasing NAND reliability and NAND life.Type: ApplicationFiled: July 18, 2022Publication date: November 3, 2022Applicant: Kioxia CorporationInventors: Saswati Das, Manish Kadam, Neil Buxton
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Patent number: 11392499Abstract: Various implementations described herein relate to systems and methods for dynamically managing buffers of a storage device, including receiving, by a controller of the storage device from a host, information indicative of a frequency by which data stored in the storage device is accessed, and in response to receiving the information determining, by the controller, the order by which read buffers of the storage device are allocated for a next read command. The NAND read count of virtual Word-Lines (WLs) are also used to cache more frequently accessed WLs, thus proactively reducing read disturb and consequently increasing NAND reliability and NAND life.Type: GrantFiled: September 18, 2020Date of Patent: July 19, 2022Assignee: KIOXIA CORPORATIONInventors: Saswati Das, Manish Kadam, Neil Buxton
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Publication number: 20220091984Abstract: Various implementations described herein relate to systems and methods for dynamically managing buffers of a storage device, including receiving, by a controller of the storage device from a host, information indicative of a frequency by which data stored in the storage device is accessed, and in response to receiving the information determining, by the controller, the order by which read buffers of the storage device are allocated for a next read command. The NAND read count of virtual Word-Lines (WLs) are also used to cache more frequently accessed WLs, thus proactively reducing read disturb and consequently increasing NAND reliability and NAND life.Type: ApplicationFiled: September 18, 2020Publication date: March 24, 2022Applicant: Kioxia CorporationInventors: Saswati DAS, Manish KADAM, Neil BUXTON
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Publication number: 20060107055Abstract: A method and system for detecting a pattern derived from or related to a data signature in data packets is provided. An intrusion detection module accepts a data packet and compares all or portions of the data packet with a set of data patterns. One or more data patterns may be related to, or indicate the existence of, or derived from a virus or other data structure, software code, software program, portions of content of a data packet, a universal resource locater, and/or a traffic classification indicator.Type: ApplicationFiled: November 17, 2004Publication date: May 18, 2006Applicant: Nesvis, NetworksInventors: Ramesh Panwar, Joseph Tardo, Manish Kadam, Swati Deshpande, Sunil Aurora