Patents by Inventor Manish Kumar Mathur

Manish Kumar Mathur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7190191
    Abstract: An input buffer circuit and associated method operable in a normal mode and a hot-plug mode. In one example, the input buffer has an input and a buffer output, and the input buffer may include a pull-up path coupled between a first circuit supply and the buffer output; a pull-down path coupled between the buffer output and a ground reference voltage; a first transistor coupled between the input and the pull-up path to activate the pull-up path; a second transistor coupled between the input and the pull-down path to activate the pull-down path; and a third transistor for protecting the pull-up path from over-voltage. The input buffer circuit may be configured to prevent an over-voltage condition on each of the plurality of transistors and the input buffer circuit may be configured to allow a hot-plug operation.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: March 13, 2007
    Assignee: Cypress Semiconductor Corporation
    Inventors: Manish Kumar Mathur, Gajender Rohilla
  • Patent number: 6842320
    Abstract: Embodiments of the present invention provide a drive and biasing circuit for an input/output stage of a device. Embodiments of the present invention provide live-insertion protection by driving and biasing various nodes in the input/output stage. Embodiments of the present invention also provide over-voltage protection by biasing various nodes in the input/output stage during normal and live-insertion operating conditions. Embodiments of the present invention utilize the voltage on the supply and/or voltage present on the input/output terminal to provide the drive and bias voltage levels. Embodiments of the present invention are thus able to turn off current paths and protect various junctions against breakdown during over-voltage and live-insertion operating conditions.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: January 11, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Manish Kumar Mathur, Gajender Rohilla