Patents by Inventor Manju Rathna Varma

Manju Rathna Varma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9003111
    Abstract: Embodiments of a Content Addressable Memory (CAM) enabling high-speed search and invalidate operations and methods of operation thereof are disclosed. In one embodiment, the CAM includes a CAM cell array including a number of CAM cells and a valid bit cell configured to generate a match indicator, and blocking circuitry configured to block an output of the valid bit cell from altering the match indicator during an invalidate process of a search and invalidate operation. Preferably, the output of the valid bit cell is blocked from affecting the match indicator for the CAM cell array beginning at a start of the invalidate process and continuing until an end of the search and invalidate operation.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: April 7, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Manju Rathna Varma, David Paul Hoff, Jason Philip Martzloff
  • Publication number: 20130339597
    Abstract: Embodiments of a Content Addressable Memory (CAM) enabling high-speed search and invalidate operations and methods of operation thereof are disclosed. In one embodiment, the CAM includes a CAM cell array including a number of CAM cells and a valid bit cell configured to generate a match indicator, and blocking circuitry configured to block an output of the valid bit cell from altering the match indicator during an invalidate process of a search and invalidate operation. Preferably, the output of the valid bit cell is blocked from affecting the match indicator for the CAM cell array beginning at a start of the invalidate process and continuing until an end of the search and invalidate operation.
    Type: Application
    Filed: August 19, 2013
    Publication date: December 19, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Manju Rathna Varma, David Paul Hoff, Jason Philip Martzloff
  • Patent number: 8572313
    Abstract: Embodiments of a Content Addressable Memory (CAM) enabling high-speed search and invalidate operations and methods of operation thereof are disclosed. In one embodiment, the CAM includes a CAM cell array including a number of CAM cells and a valid bit cell configured to generate a match indicator, and blocking circuitry configured to block an output of the valid bit cell from altering the match indicator during an invalidate process of a search and invalidate operation. Preferably, the output of the valid bit cell is blocked from affecting the match indicator for the CAM cell array beginning at a start of the invalidate process and continuing until an end of the search and invalidate operation.
    Type: Grant
    Filed: October 10, 2011
    Date of Patent: October 29, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Manju Rathna Varma, David Paul Hoff, Jason Philip Martzloff
  • Publication number: 20130091325
    Abstract: Embodiments of a Content Addressable Memory (CAM) enabling high-speed search and invalidate operations and methods of operation thereof are disclosed. In one embodiment, the CAM includes a CAM cell array including a number of CAM cells and a valid bit cell configured to generate a match indicator, and blocking circuitry configured to block an output of the valid bit cell from altering the match indicator during an invalidate process of a search and invalidate operation. Preferably, the output of the valid bit cell is blocked from affecting the match indicator for the CAM cell array beginning at a start of the invalidate process and continuing until an end of the search and invalidate operation.
    Type: Application
    Filed: October 10, 2011
    Publication date: April 11, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Manju Rathna Varma, David Paul Hoff, Jason Philip Martzloff
  • Patent number: 7952901
    Abstract: A content addressable memory (CAM) is disclosed. The CAM has first and second CAM cells in which each adjacent CAM cell is rotated 180° relative to its neighbor, which provides a compact physical arrangement having overall matched CAM array cell and RAM array cell row heights. Further, an interleaved set scheme can be applied to the CAM cells to provide reduced routing of compare signals and reduced parasitic capacitance.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: May 31, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Chiaming Chai, David Paul Hoff, Jason Philip Martzloff, Michael ThaiThanh Phan, Manju Rathna Varma
  • Publication number: 20090040801
    Abstract: A content addressable memory (CAM) is disclosed. The CAM has first and second CAM cells in which each adjacent CAM cell is rotated 180° relative to its neighbor, which provides a compact physical arrangement having overall matched CAM array cell and RAM array cell row heights. Further, an interleaved set scheme can be applied to the CAM cells to provide reduced routing of compare signals and reduced parasitic capacitance.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 12, 2009
    Applicant: QUALCOMM INCORPORATED
    Inventors: Chiaming Chai, David Paul Hoff, Jason Philip Martzloff, Michael ThaiThanh Phan, Manju Rathna Varma