Patents by Inventor Manjunath Ramachandrappa Venkatesh

Manjunath Ramachandrappa Venkatesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11849651
    Abstract: This disclosure describes a superconducting device comprising a trench and a cavity that extends through a superconducting base layer. The trench crosses the cavity. The superconducting device further comprises a first junction layer that extends from a first region of the superconducting base layer to the cavity, an insulating layer on the surface of the first junction layer, and a second junction layer that extends from a second region of the superconducting base layer to the cavity. The second junction layer overlaps with the insulating layer on the bottom of the cavity. The disclosure also describes a method for producing this disclosed superconducting device.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: December 19, 2023
    Assignee: IQM Finland Oy
    Inventors: Tianyi Li, Wei Liu, Manjunath Ramachandrappa Venkatesh, Hasnain Ahmad, Kok Wai Chan
  • Patent number: 11621388
    Abstract: The present invention relates to the manufacture of Josephson junctions. Such Josephson junctions may be suitable for use in qubits. High-quality, potentially monocrystalline, electrode and dielectric layers are formed using blanket deposition. Subsequently, the structure of one of more Josephson junctions is formed using multi-photon lithography to create openings in a resist followed by etching the electrode and dielectric layers.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: April 4, 2023
    Assignee: IQM Finland Oy
    Inventors: Tianyi Li, Wei Liu, Manjunath Ramachandrappa Venkatesh, Hasnain Ahmad, Kok Wai Chan, Kuan Yen Tan
  • Publication number: 20220359415
    Abstract: Superconducting through substrate vias (STSVs) are disclosed. The STSVs provide superconducting interconnections between opposite faces of a substrate. In an example, a method of forming STSVs includes etching openings that extend from a first side of a substrate partially through the substrate towards a second side of the substrate. The method also includes depositing a seed layer over the first side of the substrate and interior surfaces of the openings in the substrate. The method further includes forming a resist or hardmask on the first side of the substrate above the seed layer, such that the resist or hardmask comprises openings aligned with the etched openings in the substrate. The etched openings in the substrate are filled with a superconducting filler material. The substrate is thinned by removing material from the second side of the substrate until the deposited seed layer is exposed on the second side of the substrate.
    Type: Application
    Filed: May 4, 2022
    Publication date: November 10, 2022
    Inventors: Máté Jenei, Kok Wai Chan, Hasnain Ahmad, Manjunath Ramachandrappa Venkatesh, Wei Liu, Lily Yang, Tianyi Li, Jean-Luc Orgiazzi, Caspar Ockeloen-Korppi, Alessandro Landra, Mario Palma
  • Publication number: 20220359808
    Abstract: The invention relates to a method for forming flip chip bumps using electroplating. The method allows the formation of flip chip bumps in a way that is compatible with already-formed sensitive electronic components, such as Josephson junctions, which may be used in quantum processing units. The invention also relates to a product and a flip chip package in which flip chip bumps are formed with the disclosed method.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 10, 2022
    Inventors: Máté Jenei, Kok Wai Chan, Hasnain Ahmad, Manjunath Ramachandrappa Venkatesh, Wei Liu, Lily Yang, Tianyi Li, Jean-Luc Orgiazzi, Caspar Ockeloen-Korppi, Alessandro Landra, Mario Palma
  • Publication number: 20220238781
    Abstract: This disclosure describes a superconducting device comprising a trench and a cavity that extends through a superconducting base layer. The trench crosses the cavity. The superconducting device further comprises a first junction layer that extends from a first region of the superconducting base layer to the cavity, an insulating layer on the surface of the first junction layer, and a second junction layer that extends from a second region of the superconducting base layer to the cavity. The second junction layer overlaps with the insulating layer on the bottom of the cavity. The disclosure also describes a method for producing this disclosed superconducting device.
    Type: Application
    Filed: January 14, 2022
    Publication date: July 28, 2022
    Inventors: Tianyi Li, Wei Liu, Manjunath Ramachandrappa Venkatesh, Hasnain Ahmad, Kok Wai Chan
  • Publication number: 20220181538
    Abstract: The present invention relates to the manufacture of Josephson junctions. Such Josephson junctions may be suitable for use in qubits. High-quality, potentially monocrystalline, electrode and dielectric layers are formed using blanket deposition. Subsequently, the structure of one of more Josephson junctions is formed using multi-photon lithography to create openings in a resist followed by etching the electrode and dielectric layers.
    Type: Application
    Filed: December 3, 2021
    Publication date: June 9, 2022
    Inventors: Tianyi Li, Wei Liu, Manjunath Ramachandrappa Venkatesh, Hasnain Ahmad, Kok Wai Chan, Kuan Yen Tan