Patents by Inventor Manohar Seetharam

Manohar Seetharam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11595007
    Abstract: An active feedback low-noise amplifier includes a feedback transistor whose source couples through a feedback path to an input signal node. A bias transistor biases the source of the feedback transistor with a bias current responsive to an input signal carried on the input signal node.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: February 28, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Makar Snai, Manohar Seetharam
  • Publication number: 20220131505
    Abstract: An active feedback low-noise amplifier includes a feedback transistor whose source couples through a feedback path to an input signal node. A bias transistor biases the source of the feedback transistor with a bias current responsive to an input signal carried on the input signal node.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Inventors: Makar SNAI, Manohar SEETHARAM
  • Publication number: 20200083847
    Abstract: A bias circuit includes a differential amplifier including at least two field effect transistors each having a gate, a source and a drain, a gain of the differential amplifier being based at least in part on a gate bias voltage, and a temperature compensation element selectively coupled to the gate of each of the two field effect transistors, the temperature compensation element configured to provide a compensated gate bias voltage across a temperature range.
    Type: Application
    Filed: September 11, 2018
    Publication date: March 12, 2020
    Inventors: Manohar SEETHARAM, Lai Kan LEUNG
  • Patent number: 10581385
    Abstract: Certain aspects of the present disclosure are directed to a circuit for signal processing. The circuit generally includes a first transformer having a first inductive element magnetically coupled with a second inductive element, and a second transformer having a third inductive element magnetically coupled with a fourth inductive element, wherein the first inductive element is coupled in series with the third inductive element. In certain aspects, the circuit also includes a first switch coupled in parallel with the third inductive element, a capacitive element coupled in parallel with the fourth inductive element, wherein a notch is formed at least by the capacitive element and the fourth inductive element, the notch circuit coupled in series with the second inductive element, and a second switch coupled in parallel with the fourth inductive element.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: March 3, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Makar Snai, Manohar Seetharam, Ehab Abdel Ghany, Vinod Panikkath
  • Publication number: 20200036345
    Abstract: Certain aspects of the present disclosure are directed to a circuit for signal processing. The circuit generally includes a first transformer having a first inductive element magnetically coupled with a second inductive element, and a second transformer having a third inductive element magnetically coupled with a fourth inductive element, wherein the first inductive element is coupled in series with the third inductive element. In certain aspects, the circuit also includes a first switch coupled in parallel with the third inductive element, a capacitive element coupled in parallel with the fourth inductive element, wherein a notch is formed at least by the capacitive element and the fourth inductive element, the notch circuit coupled in series with the second inductive element, and a second switch coupled in parallel with the fourth inductive element.
    Type: Application
    Filed: July 23, 2019
    Publication date: January 30, 2020
    Inventors: Makar SNAI, Manohar SEETHARAM, Ehab ABDEL GHANY, Vinod PANIKKATH
  • Patent number: 10541654
    Abstract: Amplification with post-distortion compensation is disclosed. In an example aspect, an apparatus includes a voltage rail and a cascode amplifier. The cascode amplifier includes an amplification node, a cascode node, and a common-source node. The cascode amplifier also includes at least one cascode transistor, an input transistor, and a compensation transistor. The cascode transistor is coupled between the amplification node and the cascode node. The input transistor is coupled between the cascode node and the common-source node. The compensation transistor is coupled between the voltage rail and the cascode node.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: January 21, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Makar Snai, Ehab Abdel Ghany, Manohar Seetharam, Li-chung Chang
  • Publication number: 20200014340
    Abstract: Amplification with post-distortion compensation is disclosed. In an example aspect, an apparatus includes a voltage rail and a cascode amplifier. The cascode amplifier includes an amplification node, a cascode node, and a common-source node. The cascode amplifier also includes at least one cascode transistor, an input transistor, and a compensation transistor. The cascode transistor is coupled between the amplification node and the cascode node. The input transistor is coupled between the cascode node and the common-source node. The compensation transistor is coupled between the voltage rail and the cascode node.
    Type: Application
    Filed: July 9, 2018
    Publication date: January 9, 2020
    Inventors: Makar Snai, Ehab Abdel Ghany, Manohar Seetharam, Li-chung Chang
  • Patent number: 10419045
    Abstract: Certain aspects of the present disclosure generally relate to a circuit for signal processing. The circuit generally includes a first transformer having a first inductive element magnetically coupled with a second inductive element, and a second transformer having a third inductive element magnetically coupled with a fourth inductive element. In certain aspects, the first inductive element may be coupled in series with the third inductive element. In certain aspects, the circuit also includes a capacitive element coupled in parallel with the fourth inductive element, the capacitive element and the fourth inductive element forming a notch circuit, the notch circuit coupled in series with the second inductive element.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: September 17, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Makar Snai, Manohar Seetharam, Ehab Abdel Ghany, Vinod Panikkath
  • Publication number: 20160079946
    Abstract: An apparatus includes a first transistor configured to amplify first signal components within a first frequency band of a radio frequency signal, a second transistor configured to amplify second signal components within a second frequency band of the radio frequency signal, and a third transistor configured to amplify third signal components within a third frequency band of the radio frequency signal. The apparatus also includes a degeneration inductor having a first tapping point, a second tapping point, and a third tapping point. The first tapping point is coupled to the first transistor, the second tapping point is coupled to the second transistor, and the third tapping point is coupled to the third transistor.
    Type: Application
    Filed: September 12, 2014
    Publication date: March 17, 2016
    Inventors: Gireesh Rajendran, Rakesh Kumar, Manohar Seetharam