Patents by Inventor Manohar Srinivasaiah

Manohar Srinivasaiah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Uncorrectable error correction code (UECC) recovery time improvement
    Patent number: 11036582
    Abstract: An apparatus comprising non-volatile memory is configured to access a selected unit of encoded SLC data in the non-volatile memory during a first programming phase of a process of folding data stored at a single bit per memory cell to data stored at multiple bits per memory cell. The apparatus recovers the selected unit of SLC data based on redundancy data formed from units of SLC data that data include the selected unit of SLC data. The apparatus saves the recovered selected unit of SLC data to memory. The apparatus uses the saved recovered unit of SLC data during a second programming phase of folding the data stored at a single bit per memory cell to the data stored at multiple bits per memory cell, thereby saving considerable time in not having to again recover the SLC data using the redundancy data.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: June 15, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Raghavendra Gopalakrishnan, Bhanushankar Doni, Manohar Srinivasaiah
  • UNCORRECTABLE ERROR CORRECTION CODE (UECC) RECOVERY TIME IMPROVEMENT
    Publication number: 20210096948
    Abstract: An apparatus comprising non-volatile memory is configured to access a selected unit of encoded SLC data in the non-volatile memory during a first programming phase of a process of folding data stored at a single bit per memory cell to data stored at multiple bits per memory cell. The apparatus recovers the selected unit of SLC data based on redundancy data formed from units of SLC data that data include the selected unit of SLC data. The apparatus saves the recovered selected unit of SLC data to memory. The apparatus uses the saved recovered unit of SLC data during a second programming phase of folding the data stored at a single bit per memory cell to the data stored at multiple bits per memory cell, thereby saving considerable time in not having to again recover the SLC data using the redundancy data.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 1, 2021
    Applicant: Western Digital Technologies, Inc.
    Inventors: Raghavendra Gopalakrishnan, Bhanushankar Doni, Manohar Srinivasaiah