Patents by Inventor Manoj Achyutrao Joshi

Manoj Achyutrao Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Standard cell architecture and methods with variable design rules
    Patent number: 8173491
    Abstract: Structures and methods for standard cell layouts having variable rules for spacing of layers to cell boundaries are disclosed. In one embodiment, a first standard cell layout is provided with a conductive layer having at least two portions spaced apart by a minimum spacing distance, the conductive layer having at least one portion spaced from a cell boundary by a first spacing distance of less than half of the minimum spacing distance; a second standard cell disposed adjacent the first standard cell with at least one second portion of the conductive layer in the second cell disposed adjacent the first portion in the first standard cell and spaced apart from a common cell boundary by a second spacing greater than half of the minimum; wherein the sum of the first and second spacings is at least as great as the minimum spacing. A method for forming standard is disclosed.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: May 8, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Oscar M. K. Law, Manoj Achyutrao Joshi, Kong-Beng Thei, Harry Chuang
  • Standard Cell Architecture and Methods with Variable Design Rules
    Publication number: 20110177658
    Abstract: Structures and methods for standard cell layouts having variable rules for spacing of layers to cell boundaries are disclosed. In one embodiment, a first standard cell layout is provided with a conductive layer having at least two portions spaced apart by a minimum spacing distance, the conductive layer having at least one portion spaced from a cell boundary by a first spacing distance of less than half of the minimum spacing distance; a second standard cell disposed adjacent the first standard cell with at least one second portion of the conductive layer in the second cell disposed adjacent the first portion in the first standard cell and spaced apart from a common cell boundary by a second spacing greater than half of the minimum; wherein the sum of the first and second spacings is at least as great as the minimum spacing. A method for forming standard is disclosed.
    Type: Application
    Filed: March 29, 2011
    Publication date: July 21, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Oscar M. K. Law, Manoj Achyutrao Joshi, Kong-Beng Thei, Harry Chuang
  • Standard cell architecture and methods with variable design rules
    Patent number: 7919792
    Abstract: Structures and methods for standard cell layouts having variable rules for spacing of layers to cell boundaries are disclosed. In one embodiment, a first standard cell layout is provided with a conductive layer having at least two portions spaced apart by a minimum spacing distance, the conductive layer having at least one portion spaced from a cell boundary by a first spacing distance of less than half of the minimum spacing distance; a second standard cell disposed adjacent the first standard cell with at least one second portion of the conductive layer in the second cell disposed adjacent the first portion in the first standard cell and spaced apart from a common cell boundary by a second spacing greater than half of the minimum; wherein the sum of the first and second spacings is at least as great as the minimum spacing. A method for forming standard is disclosed.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: April 5, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Oscar M. K. Law, Manoj Achyutrao Joshi, Kong-Beng Thei, Harry Chuang
  • Standard Cell Architecture and Methods with Variable Design Rules
    Publication number: 20100155783
    Abstract: Structures and methods for standard cell layouts having variable rules for spacing of layers to cell boundaries are disclosed. In one embodiment, a first standard cell layout is provided with a conductive layer having at least two portions spaced apart by a minimum spacing distance, the conductive layer having at least one portion spaced from a cell boundary by a first spacing distance of less than half of the minimum spacing distance; a second standard cell disposed adjacent the first standard cell with at least one second portion of the conductive layer in the second cell disposed adjacent the first portion in the first standard cell and spaced apart from a common cell boundary by a second spacing greater than half of the minimum; wherein the sum of the first and second spacings is at least as great as the minimum spacing. A method for forming standard is disclosed.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 24, 2010
    Inventors: Oscar M.K. Law, Manoj Achyutrao Joshi, Kong-Beng Thei, Harry Chuang