Abstract: Embodiments are directed to apparatuses and methods involving a phase-error tracking circuit. An example apparatus includes a divide-by phase locked loop (PLL) circuit to generate a continuous wave signal that sweeps over a frequency range in response to a divider feedback signal and to a reference signal. The apparatus further includes the phase-error tracking circuit defining a phase-error window in which the divide-by PLL circuit is to lock based on a slope associated with a rate of change of the frequency range, and indicating whether a phase error between the divider feedback signal and the reference signal coincides with the phase-error window.

Abstract: There is provided an oscillator arrangement for generating a clock signal. The oscillator arrangement comprises a current controlled oscillator, a frequency to voltage converter, and an operational amplifier. The oscillator arrangement is connectable to a supply voltage source. In one embodiment, the oscillator arrangement may achieve a stable clock frequency insensitive to supply and temperature variation with low current consumption and low area. This may be achieved by using Vref and Vout as input signals to the operational amplifier, both signals being directly derived from the supply voltage. In a further embodiment, a trimming resistor may be used in the frequency to voltage converter for adjusting the frequency.

Abstract: An oscillator arrangement comprises a current controlled oscillator, a frequency to voltage converter, and an operational amplifier. The current controlled oscillator is adapted to generate a clock signal based on a control voltage signal, wherein the generated clock signal is supplied to the frequency to voltage converter. The frequency to voltage converter is adapted to generate an output voltage signal based on the generated clock signal and based on a supply voltage signal.