Abstract: A method for imaging objects includes illuminating an object with a light source of an imaging device, and receiving an illumination field reflected by the object. An aperture field that intercepts a pupil of the imaging device is an optical propagation of the illumination field at an aperture plane. The method includes receiving a portion of the aperture field onto a camera sensor, and receiving a sensor field of optical intensity. The method also includes iteratively centering the camera focus along the Fourier plane at different locations to produce a series of sensor fields and stitching together the sensor fields in the Fourier domain to generate an image. The method also includes determining a plurality of phase information for each sensor field in the series of sensor fields, applying the plurality of phase information to the image, receiving a plurality of illumination fields reflected by the object, and denoising the intensity of plurality of illumination fields using Fourier ptychography.

Abstract: A method for imaging objects includes illuminating an object with a light source of an imaging device, and receiving an illumination field reflected by the object. An aperture field that intercepts a pupil of the imaging device is an optical propagation of the illumination field at an aperture plane. The method includes receiving a portion of the aperture field onto a camera sensor, and receiving a sensor field of optical intensity. The method also includes iteratively centering the camera focus along the Fourier plane at different locations to produce a series of sensor fields and stitching together the sensor fields in the Fourier domain to generate an image. The method also includes determining a plurality of phase information for each sensor field in the series of sensor fields, applying the plurality of phase information to the image, receiving a plurality of illumination fields reflected by the object, and denoising the intensity of plurality of illumination fields using Fourier ptychography.

Abstract: A computer system maintains its computer system components. In an exemplary embodiment, of the computer system, a topology engine generates topology data to individually correlate hardware components, virtual machines, databases, middleware services, and applications based on hardware execution data. A hardware controller determines when a virtual machine stop condition for a virtual machine is met based on the topology data. When the virtual machine stop condition is met, the hardware controller instructs a hardware component to stop the virtual machine. The hardware controller determines when a virtual machine start condition for a virtual machine is met based on the topology data. When the virtual machine start condition is met, the hardware controller instructs a hardware component to start the virtual machine.

Abstract: A computer system maintains its computer system components. In an exemplary embodiment, of the computer system, a topology engine generates topology data to individually correlate hardware components, virtual machines, databases, middleware services, and applications based on hardware execution data. A hardware controller determines when a virtual machine stop condition for a virtual machine is met based on the topology data. When the virtual machine stop condition is met, the hardware controller instructs a hardware component to stop the virtual machine. The hardware controller determines when a virtual machine start condition for a virtual machine is met based on the topology data. When the virtual machine start condition is met, the hardware controller instructs a hardware component to start the virtual machine.

Abstract: Techniques described herein are generally related to non-interferometric phase measurements of an optical signal. The various described techniques may be applied to methods, systems, devices or combinations thereof. Some methods for determining phase data of the optical signal may include transmitting the optical signal through a first optical element and obtaining first intensity data at a first focal plane of the first optical element by an optical sensor. Example methods may also include transmitting the optical signal through a second optical element. The second optical element may include a phase transformation mask. Example methods may further include obtaining a second intensity data at a second focal plane of the second optical element by the optical sensor and determining the phase data for the optical signal based on the first intensity data and the second intensity data.

Abstract: Techniques described herein are generally related to non-interferometric phase measurements of an optical signal. The various described techniques may be applied to methods, systems, devices or combinations thereof. Some methods for determining phase data of the optical signal may include transmitting the optical signal through a first optical element and obtaining first intensity data at a first focal plane of the first optical element by an optical sensor. Example methods may also include transmitting the optical signal through a second optical element. The second optical element may include a phase transformation mask. Example methods may further include obtaining a second intensity data at a second focal plane of the second optical element by the optical sensor and determining the phase data for the optical signal based on the first intensity data and the second intensity data.

Abstract: A CMOS input buffer supporting multiple I/O standards and having a pair of NMOS and PMOS differential receivers, each having a first input connected to an input pad and a second input connected to a reference voltage, a first multiplexer connected to the control terminal of the current sink of the NMOS differential receiver and having one input connected to the positive supply terminal, and a second multiplexer connected to the control terminal of the current source of the PMOS differential receiver and having one input connected to the negative supply terminal or ground. The buffer further includes an inverter connected to a combined output of the PMOS and NMOS differential receivers and having an output connected to the second input of the first and second multiplexer, and a configuration storage bit for selecting the desired inputs of the first and second multiplexer, thereby supporting high speed standards as well as general purpose standards while reducing static power dissipation.

Abstract: An Input Output Block (IOB) provides programmable hysteresis to support multiple IO standards including a differential amplifier having one input coupled to an input signal and its second input coupled to a complementary input signal in the case of differential signalling, or to a reference voltage for the case of single-ended signalling, a pair of series coupled digital inverters coupled to one output of said differential amplifier, one or more transistors coupled in parallel with each input transistor of the differential amplifier, each transistor of each parallel coupled set being of a different size relative to the corresponding input transistor, the control terminal of each parallel coupled transistor in each set being coupled to the output of one of said series coupled inverters such that positive feedback is provided directly or indirectly through a selection switch, and hysteresis control bits that symmetrically enable or disable each said selection switch to provide a programmable level of hysteresis

Abstract: The differential input receiver provides constant symmetrical hysteresis over a wide input signal range. The differential input receiver includes a pair of complementary differential comparators having common input terminals, a pair of series connected complementary current mirrors each having source terminals driven by the output terminals of the corresponding differential comparator, a pair of transistors connected in series across each differential pair transistor in each differential comparator to form a potential divider across it, and a pair of series connected inverting buffers connected to a common output of the differential comparators to provide the final output. The individual buffer outputs are fed back to the control terminals of the series connected transistors in a manner that provides positive feedback thereby providing equal rise-time, fall-delay and transition times in the output signal.