Patents by Inventor Manoj Sharma Kumar

Manoj Sharma Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Area optimized driver layout
    Patent number: 9268894
    Abstract: A computerized method for designing a layout of a driver includes analyzing a schematic circuit. PMOSFETs coupled between first common nodes are grouped into one or more first classes. NMOSFETs coupled between second common nodes are grouped into one or more second classes. The method further includes generating the layout for each MOSFET at each location in a layout area of the driver by generating a super parameterized cell (PCELL) layout block comprising a master MOSFET PCELL and a master guard ring PCELL for each of the first class and the second class. The master MOSFET PCELL includes a first set of parameters for the MOSFET and the master guard ring PCELL includes a second set of parameters for the guard ring around the MOSFET. A child PCELL of the master MOSFET PCELL and the master guard ring PCELL are instantiated at each location in the layout area.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: February 23, 2016
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Vishal Kumar Sharma, Manoj Sharma Kumar
  • Area Optimized Driver Layout
    Publication number: 20150331985
    Abstract: A computerized method for designing a layout of a driver includes analyzing a schematic circuit. PMOSFETs coupled between first common nodes are grouped into one or more first classes. NMOSFETs coupled between second common nodes are grouped into one or more second classes. The method further includes generating the layout for each MOSFET at each location in a layout area of the driver by generating a super parameterized cell (PCELL) layout block comprising a master MOSFET PCELL and a master guard ring PCELL for each of the first class and the second class. The master MOSFET PCELL includes a first set of parameters for the MOSFET and the master guard ring PCELL includes a second set of parameters for the guard ring around the MOSFET. A child PCELL of the master MOSFET PCELL and the master guard ring PCELL are instantiated at each location in the layout area.
    Type: Application
    Filed: May 16, 2014
    Publication date: November 19, 2015
    Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Vishal Kumar Sharma, Manoj Sharma Kumar