Patents by Inventor Manoj Shridhar Soman

Manoj Shridhar Soman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9478231
    Abstract: Methods and systems provide a partitioned IP core and hierarchical power management to reduce power consumption and footprint size of an “always-on” pulse density modulation (PDM) sensor system. The IP core may be partitioned into a register transfer level (RTL) block and a firmware block. The RTL may include a first stage decimation filter, storage, and, optionally, a sound energy detector. The firmware block may include subsequent decimation filter(s) and sensor processing logic, e.g., a sound trigger algorithm. In operation, the firmware block may conserve energy by being in a power-off or power-saving mode by default. Responsive to a trigger by the sound energy detector, the firmware block may wake up, receive data from the RTL block, and process the data. The sound energy detector may output the trigger based on characteristics of the received sample such as signal strength, noise strength, and type.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: October 25, 2016
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventor: Manoj Shridhar Soman
  • Patent number: 8787964
    Abstract: An integrated RF front-end circuit comprising a balun, a receiver amplifier, a power amplifier, and a selector circuit is provided. The balun comprises a center-tapped inductor having a first node, a center-tap switchlessly coupled to a fixed voltage, and a second node. The balun receives a single-ended signal through the first node to produce a differential signal at the first and second nodes. The differential signal is provided to balanced input lines of the receiver amplifier. Balanced output lines of the power amplifier provide a differential signal to the first and second nodes. The balun converts the differential signal to a single-ended signal. The single-ended signal is available at the first node of the center-tapped inductor. The selector circuit activates the receiver amplifier and deactivates the power amplifier, and vice versa. The power amplifier may comprise only a single-ended output line connected to either the first or the second node.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: July 22, 2014
    Assignee: Mindtree Limited
    Inventor: Manoj Shridhar Soman
  • Patent number: 8547185
    Abstract: An electronic balun circuit is provided for converting a single-ended signal into a differential signal and vice versa, comprising a center-tapped inductor having a first node, a center-tap coupled to a constant voltage source, and a second node. A first impedance circuit is coupled with the first node and with a line carrying single-ended signal to and from the first node. A second impedance circuit is coupled with the second node. The first node receives the single-ended signal to produce a differential signal at the first and second nodes. The first and second nodes receive the differential signal to produce the single-ended signal at the first node. Both first and second impedance circuits have an impedance of 2RL, resulting in a total effective impedance of Rin for achieving an impedance match between the line and the first node. Furthermore, a passive network is added to balance the balun.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: October 1, 2013
    Assignee: Mindtree Limited
    Inventor: Manoj Shridhar Soman
  • Publication number: 20120013417
    Abstract: An electronic balun circuit is provided for converting a single-ended signal into a differential signal and vice versa, comprising a center-tapped inductor having a first node, a center-tap coupled to a constant voltage source, and a second node. A first impedance circuit is coupled with the first node and with a line carrying single-ended signal to and from the first node. A second impedance circuit is coupled with the second node. The first node receives the single-ended signal to produce a differential signal at the first and second nodes. The first and second nodes receive the differential signal to produce the single-ended signal at the first node. Both first and second impedance circuits have an impedance of 2RL, resulting in a total effective impedance of Rin for achieving an impedance match between the line and the first node. Furthermore, a passive network is added to balance the balun.
    Type: Application
    Filed: September 1, 2010
    Publication date: January 19, 2012
    Inventor: Manoj Shridhar Soman
  • Publication number: 20110319042
    Abstract: An integrated RF front-end circuit comprising a balun, a receiver amplifier, a power amplifier, and a selector circuit is provided. The balun comprises a center-tapped inductor having a first node, a center-tap switchlessly coupled to a fixed voltage, and a second node. The balun receives a single-ended signal through the first node to produce a differential signal at the first and second nodes. The differential signal is provided to balanced input lines of the receiver amplifier. Balanced output lines of the power amplifier provide a differential signal to the first and second nodes. The balun converts the differential signal to a single-ended signal. The single-ended signal is available at the first node of the center-tapped inductor. The selector circuit activates the receiver amplifier and deactivates the power amplifier, and vice versa. The power amplifier may comprise only a single-ended output line connected to either the first or the second node.
    Type: Application
    Filed: September 3, 2010
    Publication date: December 29, 2011
    Inventor: Manoj Shridhar Soman
  • Patent number: 7019677
    Abstract: A current steering digital to analog converter includes a current source for selectively providing a selected amount of current to an output in response to input data. The current source includes a selected number of sub-current sources for selectively providing fractions of the selected amount of current to the output. Compensation current sources each provide a selected amount of compensation current to the output. Compensation control circuitry, in response to the input data, selectively activates and de-activates selected ones of the sub-current sources and the compensation current sources to provide current compensation at the output.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: March 28, 2006
    Assignee: Cirrus Logic, Inc.
    Inventors: Manoj Shridhar Soman, Krishnan Subramoniam, Rajendra Datar