Patents by Inventor Manoj Soman

Manoj Soman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7162029
    Abstract: A gain or input volume controller and method includes a modified R2R ladder network having a number of R2R branches, switches coupled respectively to the R2R branches, and a switch controller for respectively controlling the switches to control and provide an overall gain value for a signal. The switch controller further includes a mapper for mapping a gain control signal to the switches wherein the gain control signal respectively activates or deactivates the switches. A fine gain control stage provides a fine gain control of the overall gain value. A coarse gain control stage is coupled to the fine gain control stage. The coarse gain control stage includes the modified R2R ladder network and provides a coarse gain control of the overall gain value.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: January 9, 2007
    Assignee: Cirrus Logic, Inc.
    Inventors: Manoj Soman, Krishnan Subramoniam, Hua Hong, Rajendra Datar, John Laurence Melanson
  • Patent number: 6850616
    Abstract: A method of detecting frequency errors exceeding a predetermined limit in a sampled signal includes the step of determining a peak amplitude of the signal at a tone frequency for a first frame of samples of the sampled signals using a filter having a first amplitude versus frequency response. A peak amplitude of signal at the tone frequency is determined for a second frame of samples of the sampled signal using a filter having a second amplitude versus frequency response. A ratio between the peak amplitude of the first frame and the peak amplitude of the second frame is calculated and compared against a threshold to detect frequency errors exceeding the predetermined limit. Among other things, this method decouples the frequency error detection problem from the twist factor estimation problem.
    Type: Grant
    Filed: January 22, 2001
    Date of Patent: February 1, 2005
    Assignee: Cirrus Logic, Inc.
    Inventors: Manoj Soman, Sachin Ghanekar, Rajendra Datar
  • Publication number: 20040240918
    Abstract: A gain or input volume controller and method includes a modified R2R ladder network having a number of R2R branches, switches coupled respectively to the R2R branches, and a switch controller for respectively controlling the switches to control and provide an overall gain value for a signal. The switch controller further includes a mapper for mapping a gain control signal to the switches wherein the gain control signal respectively activates or deactivates the switches. A fine gain control stage provides a fine gain control of the overall gain value. A coarse gain control stage is coupled to the fine gain control stage. The coarse gain control stage includes the modified R2R ladder network and provides a coarse gain control of the overall gain value.
    Type: Application
    Filed: May 29, 2003
    Publication date: December 2, 2004
    Inventors: Manoj Soman, Krishnan Subramoniam, Hua Hong, Rajendra Datar, John Melanson
  • Patent number: 6608572
    Abstract: An integrated analog to digital and sample rate converter 206 includes sampling circuitry 207 for receiving an analog signal and generating a single or multibit stream of digital signals at a first rate. A leaky integrator filter 208 removes quantization noise from the stream of samples such that resampling can be carried out. Circuitry 209/210 resamples the filtered stream of samples output from leaky integrator filter 208 to generate an output stream of samples at a second rate.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: August 19, 2003
    Assignee: Cirrus Logic, Inc.
    Inventors: Anand Venkitachalam, Joe Welser, Manoj Soman, Krishnan Subramoniam
  • Publication number: 20020137501
    Abstract: A system 200 for remotely programming a memory 205 includes a host system 201 for developing a set of code. A wireless transmitter 202 is associated with host system 201 for transmitting the code and a wireless receiver 206 is associated with memory 205 for receiving the transmitted code. System 200 further includes circuitry for storing the code received by wireless receiver 206 in memory 205.
    Type: Application
    Filed: March 23, 2001
    Publication date: September 26, 2002
    Inventors: Rajendra Datar, Manoj Soman, Sachin Ghanekar
  • Publication number: 20020097860
    Abstract: A method of detecting frequency errors exceeding a predetermined limit in a sampled signal includes the step of determining a peak amplitude of the signal at a tone frequency for a first frame of samples of the sampled signals using a filter having a first amplitude versus frequency response. A peak amplitude of signal at the tone frequency is determined for a second frame of samples of the sampled signal using a filter having a second amplitude versus frequency response. A ratio between the peak amplitude of the first frame and the peak amplitude of the second frame is calculated and compared against a threshold to detect frequency errors exceeding the predetermined limit. Among other things, this method decouples the frequency error detection problem from the twist factor estimation problem.
    Type: Application
    Filed: January 22, 2001
    Publication date: July 25, 2002
    Applicant: Cirrus Logic, Inc.
    Inventors: Manoj Soman, Sachin Ghanekar, Rajendra Datar
  • Patent number: 6265859
    Abstract: A current mirror 100 includes a current mirroring transistor 103 having a selected aspect ratio for conducting a mirrored current of a selected mirroring ratio with respect to a reference current. A plurality of reference current transistors 201 are disposed in parallel with current mirroring transistor 103, each of the reference current transistors 201 having a current path coupled to a source 105 of the reference current and a selected aspect ratio. A switch 207 is coupled to a control terminal of a selected reference current transistor 201a, for selectively turning on and turning off a selected reference current transistor 201a to adjust the mirroring ratio.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: July 24, 2001
    Assignee: Cirrus Logic, Inc.
    Inventors: Rajendra Datar, Manoj Soman