Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.

Abstract: Two implementations of the inverse wavelet transform for use in an image decompression system do not waste computation power on the zero-valued values inserted into the data stream during an upsampling process. The implementation optimized for low-bandwidth applications toggles between even and odd modes each clock cycle. In even/odd mode, the transformed values are multiplied by the even/odd filter coefficients. The implementation optimized for high-bandwidth applications multiplies the transformed values by the even and odd filter coefficients seperately in two sets of multipliers and outputs two different results each clock cycle.

Abstract: A method derives edge extensions for wavelet transforms and inverse wavelet transforms of two-dimensional images. The method overcomes the necessity of side computations by treating the two-dimensional matrix of values as a one-dimensional array of values. The use of a one-dimensional array reduces the required flushing and loading of registers by allowing the flushing and loading to be performed in between frames, rather than in between rows or columns of the matrix.

Abstract: A system and method implementing a fast wavelet transform by shifting a pair of pixels into a single shift register and using a multimode quadrature mirror filter to eliminate the need of downsampling the filtered signals and to decrease the area required to implement the device on a semiconductor chip.

Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications using a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.