Patents by Inventor Manpreet S. Khaira

Manpreet S. Khaira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5574867
    Abstract: A first-come-first-serve ("FCFS") scheduler that routes requests from two or more clients to a single resource. The FCFS scheduler contains a time stamp mechanism which provides a time stamp for each request. The scheduler provides resource access to the client with the oldest generated request and under a predetermined priority scheme in the event of simultaneous requests. The time stamps are generated by adders which add the current value of a time stamp counter with the number of client requests. The time stamp counter is incremented by the output of the adders. The updated value of the counter is decoded into a time stamp output value stored within time stamp registers. A hifind circuit reads the registers and generates an output signal associated with the set of registers, and corresponding client request, with the lowest time stamp. The output signal allows the client to access the resource.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: November 12, 1996
    Assignee: Intel Corporation
    Inventor: Manpreet S. Khaira
  • Patent number: 5367679
    Abstract: A scheduler for scheduling communication by a plurality of clients who compete to use a shared resource. Each client asserts a request bit to request use of the shared resource, and receives a grant bit from the scheduler that is asserted when the client is scheduled to use the shared resource. The scheduler includes a SC generation unit in which the request bits are inverted, the bit at the previous scheduling cycle grant is forced, and a scheduler carry operation is performed on the inverted request bits and grant bits to supply carry bits. The carry bits are "AND"ed with the forced, inverted request bits to supply a SC result and a carryout bit. The carryin bit is initially assumed to be zero, and the SC generation unit performs an initial operation. If the carryout bit from the final generation unit is zero, then the SC result bits for the initial operation provide the .grant word for the current scheduling cycle.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: November 22, 1994
    Assignee: Intel Corporation
    Inventor: Manpreet S. Khaira
  • Patent number: 5357512
    Abstract: A conditional carry scheduling unit that performs a scheduler carry operation for a round robin scheduler that schedules communication among a plurality of clients who compete to use a shared resource. Each client asserts a request bit to request use of the shared resource, and receives a grant bit from the round robin scheduler that is asserted when the client is scheduled to use the shared resource. The conditional carry scheduling unit includes a plurality of 2-bit carry generation units that operate in parallel. Within each of the 2-bit carry generation units except the initial carry generation unit, two conditional output signals are produced and supplied to a multiplexer tree. The initial carry generation unit assumes a carryin bit of zero, and outputs its carryout bit to the multiplexer tree which determines the actual carries and supplies them back to the carry generation units.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: October 18, 1994
    Assignee: Intel Corporation
    Inventors: Manpreet S. Khaira, Nitin Y. Borkar