Patents by Inventor Mantu Hudait

Mantu Hudait has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10263079
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed, which may include forming a modulation doped heterostructure, comprising forming an active portion having a first bandgap and forming a delta doped portion having a second bandgap.
    Type: Grant
    Filed: December 17, 2016
    Date of Patent: April 16, 2019
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Publication number: 20170104069
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed, which may include forming a modulation doped heterostructure, comprising forming an active portion having a first bandgap and forming a delta doped portion having a second bandgap.
    Type: Application
    Filed: December 17, 2016
    Publication date: April 13, 2017
    Applicant: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Patent number: 9564490
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed, which may include forming a modulation doped heterostructure, comprising forming an active portion having a first bandgap and forming a delta doped portion having a second bandgap.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: February 7, 2017
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Publication number: 20160118464
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed, which may include forming a modulation doped heterostructure, comprising forming an active portion having a first bandgap and forming a delta doped portion having a second bandgap.
    Type: Application
    Filed: December 30, 2015
    Publication date: April 28, 2016
    Applicant: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Patent number: 9257346
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: February 9, 2016
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Patent number: 9048266
    Abstract: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: June 2, 2015
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Been-Yih Jin, Benjamin Chu-Kung, Robert Chau
  • Patent number: 8846480
    Abstract: A surface channel transistor is provided in a semiconductive device. The surface channel transistor is either a PMOS or an NMOS device. Epitaxial layers are disposed above the surface channel transistor to cause an increased bandgap phenomenon nearer the surface of the device. A process of forming the surface channel transistor includes grading the epitaxial layers.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: September 30, 2014
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Gilbert Dewey, Jack T. Kavalieros
  • Publication number: 20140099759
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: December 12, 2013
    Publication date: April 10, 2014
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Patent number: 8633471
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed, which may include a modulation doped heterostructure, wherein the modulation doped heterostructure may comprise an active portion having a first bandgap and a delta doped portion having a second bandgap.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: January 21, 2014
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Publication number: 20130313520
    Abstract: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: August 1, 2013
    Publication date: November 28, 2013
    Inventors: Ravi Pillarisetty, Mantu Hudait, Been-Yih Jin, Benjamin Chu-Kung, Robert Chau
  • Patent number: 8525151
    Abstract: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: September 3, 2013
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Been-Yih Jin, Benjamin Chu-Kung, Robert Chau
  • Patent number: 8501508
    Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: August 6, 2013
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Mantu Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey, Titash Rakshit, Willman Tsai
  • Publication number: 20130164898
    Abstract: A surface channel transistor is provided in a semiconductive device. The surface channel transistor is either a PMOS or an NMOS device. Epitaxial layers are disposed above the surface channel transistor to cause an increased bandgap phenomenon nearer the surface of the device. A process of forming the surface channel transistor includes grading the epitaxial layers.
    Type: Application
    Filed: February 21, 2013
    Publication date: June 27, 2013
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Gilbert Dewey, Jack T. Kavelieros
  • Publication number: 20120326123
    Abstract: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: July 10, 2012
    Publication date: December 27, 2012
    Inventors: RAVI PILLARISETTY, Mantu Hudait, Been-Yih Jin, Benjamin Chu-Kung, Robert Chau
  • Patent number: 8258498
    Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: September 4, 2012
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Mantu Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey, Titash Rakshit, Willman Tsai
  • Patent number: 8242001
    Abstract: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: August 14, 2012
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Mantu Hudait, Been-Yih Jin, Benjamin Chu-Kung, Robert Chau
  • Patent number: 8115235
    Abstract: A quantum well (QW) layer is provided in a semiconductive device. The QW layer is provided with a beryllium-doped halo layer in a barrier structure below the QW layer. The semiconductive device includes InGaAs bottom and top barrier layers respectively below and above the QW layer. The semiconductive device also includes a high-k gate dielectric layer that sits on the InP spacer first layer in a gate recess. A process of forming the QW layer includes using an off-cut semiconductive substrate.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: February 14, 2012
    Assignee: Intel Corporation
    Inventors: Ravi Pillarisetty, Titash Rakshit, Mantu Hudait, Marko Radosavljevic, Gilbert Dewey, Benjamin Chu-Kung
  • Publication number: 20120032146
    Abstract: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: October 17, 2011
    Publication date: February 9, 2012
    Inventors: Ravi Pillarisetty, Mantu Hudait, Been-Yin Jin, Benjamin Chu-Kung, Robert Chau
  • Publication number: 20110140171
    Abstract: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: February 23, 2011
    Publication date: June 16, 2011
    Inventors: Ravi Pillarisetty, Mantu Hudait, Marko Radosavljevic, Willy Rachmady, Gilbert Dewey, Jack Kavalieros
  • Patent number: 7947971
    Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: May 24, 2011
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Mantu Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey, Titash Rakshit, Willman Tsai