Abstract: The present invention relates to a computer-implemented method capable of automatically classifying and differentiating biliary lesions in images obtained from a digital cholangioscopy system, characterizing them according to their malignant potential, through the classification of pixels as a malignant lesion, or benign lesion, followed by a characterization stage and indexing of such lesions according to a set of morphologic characteristics with clinical relevance, namely the presence/absence of tumor vessels, the presence/absence of papillary projections, the presence/absence of intraductal nodules and the presence/absence of tumor masses.

Abstract: The use of tocotrienols in medicine, veterinary or cosmetics, namely through the stabilization of tocotrienols, in particular in cosmetic formulations without hampering its functions in the skin is provided. In particular, the modification of tocotrienols with nicotinic acid results in the stabilization of the molecule and the penetration profile in human skin. The compounds and composition of are useful in medicine, veterinary or cosmetic industry namely in the prevention, therapy or treatment of skin diseases, skin disorders, or as a therapy or treatment of acne, seborrheic dermatitis or as an anti-aging agent.

Abstract: The exemplary embodiment is for an architecture integrated in a generic System on Chip (SoC) and consisting of reconfigurable coprocessors for executing nested program loops performed in a functional unit array in parallel. The data arrays are accessed from one or more system inputs and from an embedded memory array in parallel. The processed data arrays are sent back to the memory array or to system outputs and enable the acceleration of nested loops. The coprocessors are connected either synchronously or using asynchronous first in first out memories (FIFOs), forming a globally asynchronous locally synchronous system and each coprocessor can be programmed by tagging and rewriting the nested loops in the original program and produces a coprocessor configuration per each nested loop group, which is replaced in the original code with coprocessor input/output operations and control.

Abstract: The proposed architecture is integrated in a generic System on Chip (SoC) and can include or consist of an expanded network interface and an infrastructure for accessing Intellectual Property (IP) cores in the system. The architecture enables the system on chip to communicate with a user workstation connected to a communication network. The invention can be used as a simplified network interface for data exchange, which does not require embedded processors and respective software. The invention can be used to temporarily replace the normal data input and output of an IP core with stimuli and responses used for a variety of purposes.

Abstract: The architectures derived from the proposed template are integrated in a generic System on Chip (SoC) and consist of reconfigurable coprocessors for executing nested program loops whose bodies are expressions of operations performed in a functional unit array in parallel. The data arrays are accessed from one or more system inputs and from an embedded memory array in parallel. The processed data arrays are sent back to the memory array or to system outputs. The architectures enable the acceleration of nested loops compared to execution on a standard processor, where only one operation or datum access can be performed at a time. The invention can be used in a number of applications especially those which involve digital signal processing, such as multimedia and communications. The architectures are used preferably in conjunction with von Neumann processors which are better at implementing control flow.

Abstract: The proposed architecture is integrated in a generic System on Chip (SoC) and can include or consist of an expanded network interface and an infrastructure for accessing Intellectual Property (IP) cores in the system. The architecture enables the system on chip to communicate with a user workstation connected to a communication network. The invention can be used as a simplified network interface for data exchange, which does not require embedded processors and respective software. The invention can be used to temporarily replace the normal data input and output of an IP core with stimuli and responses used for a variety of purposes.

Abstract: A molding machine having a mold including upper and lower mold plates, an upper heat transfer platen connected to the upper mold plate, and a lower heat transfer platen connected to the lower mold plate. Each mold plate contains mold cavities. When the mold plates are aligned and abutted, mold locations from the upper and lower mold plates cooperate to form mold volumes. Each of the heat transfer platens contain two series of independent channels for supplying heat transfer media to control the temperature of the material being molded. Each series of channels includes feeder channels and transverse channels. All of the transverse channels of a heat transfer platen are substantially coplanar and parallel. A plurality of adapters supplies heat transfer media to the channels. A ram is connected to one of the heat transfer platens. A control system controls movement of the ram. A protection device continuously monitors the operation of the molding machine.