Patents by Inventor Manuel J. Torreno, Jr. deceased

Manuel J. Torreno, Jr. deceased has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5348895
    Abstract: An embodiment of the present invention is a method of fabricating power and non-power devices on a semiconductor substrate, the method comprising: forming alignment marks in the substrate (100); introducing a dopant of a first conductivity type into the substrate to form high-voltage tank regions ( 103); annealing the dopants (105); introducing dopants of the first conductivity type and a second conductivity type in a region in the high-voltage tank region (109); annealing the dopants of the first and the second conductivity type to form a second region within a third region, both within the high-voltage tank region, due to the different rates of diffusion of the dopants (110); and forming gate structures after the annealing of the dopants of the first and second conductivity types (122).
    Type: Grant
    Filed: June 2, 1993
    Date of Patent: September 20, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Michael C. Smayling, Manuel J. Torreno, Jr. deceased, George Falessi