Patents by Inventor Manuel L. Breva

Manuel L. Breva has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10957830
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: March 23, 2021
    Assignee: Cree, Inc.
    Inventors: Bradley E Williams, Kevin W Haberern, Bennett D Langsdorf, Manuel L Breva
  • Publication number: 20200365782
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.
    Type: Application
    Filed: July 31, 2020
    Publication date: November 19, 2020
    Inventors: Bradley E. Williams, Kevin W. Haberern, Bennett D. Langsdorf, Manuel L. Breva
  • Patent number: 10734558
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: August 4, 2020
    Assignee: Cree Huizhou Solid State Lighting Company Limited
    Inventors: Bradley E Williams, Kevin W Haberern, Bennett D Langsdorf, Manuel L Breva
  • Publication number: 20190198734
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.
    Type: Application
    Filed: March 1, 2019
    Publication date: June 27, 2019
    Inventors: BRADLEY E. WILLIAMS, KEVIN W. HABERERN, BENNETT D. LANGSDORF, MANUEL L. BREVA
  • Patent number: 10243121
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: March 26, 2019
    Assignee: Cree, Inc.
    Inventors: Bradley E Williams, Kevin W Haberern, Bennett D Langsdorf, Manuel L Breva
  • Patent number: 10186644
    Abstract: Described herein are LED chips incorporating self-aligned floating mirror layers that can be configured with contact vias. These mirror layers can be utilized to reduce dim areas seen around the contact vias due to underlying material layers without the need for the mirror layer to be designed at some tolerance distance from the electrical via. This increases mirror area, eliminating lower light reflection in the proximity of the via and producing higher light output with greater light emission uniformity. In some embodiments, the mirror layer is formed with a contact via. This allows for a self-aligning process and results in the mirror layer extending substantially from the edge of the via.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: January 22, 2019
    Assignee: Cree, Inc.
    Inventors: Eric Mayer, Jae Park, Manuel L. Breva
  • Publication number: 20170179350
    Abstract: Described herein are LED chips incorporating self-aligned floating mirror layers that can be configured with contact vias. These mirror layers can be utilized to reduce dim areas seen around the contact vias due to underlying material layers without the need for the mirror layer to be designed at some tolerance distance from the electrical via. This increases mirror area, eliminating lower light reflection in the proximity of the via and producing higher light output with greater light emission uniformity. In some embodiments, the mirror layer is formed with a contact via. This allows for a self-aligning process and results in the mirror layer extending substantially from the edge of the via.
    Type: Application
    Filed: September 21, 2015
    Publication date: June 22, 2017
    Inventors: Eric Mayer, Jae Park, Manuel L. Breva
  • Publication number: 20160087173
    Abstract: Described herein are LED chips incorporating self-aligned floating mirror layers that can be configured with contact vias. These mirror layers can be utilized to reduce dim areas seen around the contact vias due to underlying material layers without the need for the mirror layer to be designed at some tolerance distance from the electrical via. This increases mirror area, eliminating lower light reflection in the proximity of the via and producing higher light output with greater light emission uniformity. In some embodiments, the mirror layer is formed with a contact via. This allows for a self-aligning process and results in the mirror layer extending substantially from the edge of the via.
    Type: Application
    Filed: September 21, 2015
    Publication date: March 24, 2016
    Inventors: Eric Mayer, Jae Park, Manuel L. Breva
  • Publication number: 20150249196
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.
    Type: Application
    Filed: April 29, 2015
    Publication date: September 3, 2015
    Inventors: BRADLEY E. WILLIAMS, Kevin W. Haberern, Bennett D. Langsdorf, Manuel L. Breva