Patents by Inventor Manuel M. Del Arroz

Manuel M. Del Arroz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11456597
    Abstract: Voltage clamping and level shifting is provided. A first reverse direction high-electron-mobility transistor includes a source connected to an input pad, and a drain connected to a first reference voltage. A second reverse direction high-electron-mobility transistor includes a source and a gate connected to a second reference voltage, and a drain connected to the input pad. A gate of the first reverse direction high-electron-mobility transistor is connected to the second reference voltage.
    Type: Grant
    Filed: April 3, 2021
    Date of Patent: September 27, 2022
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Publication number: 20210249855
    Abstract: Voltage clamping and level shifting is provided. A first reverse direction high-electron-mobility transistor includes a source connected to an input pad, and a drain connected to a first reference voltage. A second reverse direction high-electron-mobility transistor includes a source and a gate connected to a second reference voltage, and a drain connected to the input pad. A gate of the first reverse direction high-electron-mobility transistor is connected to the second reference voltage.
    Type: Application
    Filed: April 3, 2021
    Publication date: August 12, 2021
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Patent number: 10886732
    Abstract: A circuit includes an output and a reverse direction high-electron-mobility transistor. The reverse direction high-electron-mobility transistor includes a drain connected to the output. The reverse direction high-electron-mobility transistor also includes a source and a gate. A transistor includes a source, a gate connected to a control pin and a drain connected to the gate of the reverse direction high-electron-mobility transistor.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: January 5, 2021
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Patent number: 10879694
    Abstract: A flip-flop circuit includes two inverters and two transmission circuits. The two inverters and the two transmission circuits are implemented using reverse direction high-electron-mobility transistors.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: December 29, 2020
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Publication number: 20200235742
    Abstract: A flip-flop circuit includes two inverters and two transmission circuits. The two inverters and the two transmission circuits are implemented using reverse direction high-electron-mobility transistors.
    Type: Application
    Filed: April 7, 2020
    Publication date: July 23, 2020
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Patent number: 10651852
    Abstract: A logic gate includes at least one reverse direction high-electron-mobility transistor. The reverse direction high-electron-mobility transistor includes at least one source connected to a first reference voltage, at least one gate connected to an output, and at least one drain connected to the output. Logic implementing circuitry is connected between the output an additional reference voltage. The logic implementing circuitry includes a first transistor that includes a gate connected to a first input, and a second transistor that includes a gate connected to a second input.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: May 12, 2020
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Publication number: 20200127454
    Abstract: Voltage clamping is provided. A first reverse direction high-electron-mobility transistor includes a source and a gate connected to a voltage clamped line, and a drain connected to a first reference voltage. A second reverse direction high-electron-mobility transistor includes a source and a gate connected to a second reference voltage, and a drain connected to the voltage clamped line.
    Type: Application
    Filed: January 11, 2019
    Publication date: April 23, 2020
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Publication number: 20200127664
    Abstract: A logic gate includes at least one reverse direction high-electron-mobility transistor. The reverse direction high-electron-mobility transistor includes at least one source connected to a first reference voltage, at least one gate connected to an output, and at least one drain connected to the output. Logic implementing circuitry is connected between the output an additional reference voltage. The logic implementing circuitry includes a first transistor that includes a gate connected to a first input, and a second transistor that includes a gate connected to a second input.
    Type: Application
    Filed: October 21, 2019
    Publication date: April 23, 2020
    Inventors: David L. Whitney, Manuel M. Del Arroz
  • Publication number: 20200126970
    Abstract: A circuit includes an output and a reverse direction high-electron-mobility transistor. The reverse direction high-electron-mobility transistor includes a drain connected to the output. The reverse direction high-electron-mobility transistor also includes a source and a gate. A transistor includes a source, a gate connected to a control pin and a drain connected to the gate of the reverse direction high-electron-mobility transistor.
    Type: Application
    Filed: January 11, 2019
    Publication date: April 23, 2020
    Inventors: David L. Whitney, Manuel M. Del Arroz