Patents by Inventor MANUEL P. C. HEILIGERS

MANUEL P. C. HEILIGERS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device identifier generation method and semiconductor device
    Patent number: 9129671
    Abstract: A method (100) is disclosed of generating an identifier from a semiconductor device (600) comprising a volatile memory (610) having a plurality of memory cells. The method comprises causing (110) the memory cells to assume a plurality of pseudo-random bit values inherent to variations in the microstructure of the memory cells; retrieving (120) the bit values from at least a subset of the plurality of memory cells; and generating the identifier from the retrieved bit values. The method (100) is based on the realization that a substantial amount of the cells of a volatile memory can assume a bit value that is governed by underlying variations in manufacturing process parameters; this for instance occurs at power-up for an SRAM or after a time period without refresh for a DRAM.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: September 8, 2015
    Assignee: NXP B.V.
    Inventors: Roelof H. W. Salters, Rutger S. Van Veen, Manuel P. C. Heiligers, Abraham C. Kruseman, Pim T. Tuyls, Geert J. Schrijen, Boris Skoric
  • SEMICONDUCTOR DEVICE IDENTIFIER GENERATION METHOD AND SEMICONDUCTOR DEVICE
    Publication number: 20100070777
    Abstract: A method (100) is disclosed of generating an identifier from a semiconductor device (600) comprising a volatile memory (610) having a plurality of memory cells. The method comprises causing (110) the memory cells to assume a plurality of pseudo-random bit values inherent to variations in the microstructure of the memory cells; retrieving (120) the bit values from at least a subset of the plurality of memory cells; and generating the identifier from the retrieved bit values. The method (100) is based on the realization that a substantial amount of the cells of a volatile memory can assume a bit value that is governed by underlying variations in manufacturing process parameters; this for instance occurs at power-up for an SRAM or after a time period without refresh for a DRAM.
    Type: Application
    Filed: April 4, 2007
    Publication date: March 18, 2010
    Applicant: NXP B.V.
    Inventors: ROELOF H. W. SALTERS, RUTGER S. VAN VEEN, MANUEL P. C. HEILIGERS, ABRAHAM C. KRUSEMAN, PIM T. TUYLS, GEERT J. SCHRIJEN, BORIS SKORIC