Patents by Inventor Manuel Stabentheiner

Manuel Stabentheiner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Group III Nitride-Based Transistor Device
    Publication number: 20220271147
    Abstract: In an embodiment, a Group III nitride-based transistor device, includes a first Group III nitride barrier layer arranged on a Group III nitride channel layer, the first Group III nitride barrier layer and the Group III nitride channel layer having differing bandgaps and forming a heterojunction capable of supporting a two-dimensional charge gas. A source, a gate and a drain are on an upper surface of the first Group III nitride barrier layer. A gate recess extends from the upper surface of the first Group III nitride barrier layer into the first Group III nitride barrier layer. A p-doped Group III nitride material arranged in the gate recess has a first extension extending on the upper surface of the first Group III nitride barrier layer towards the drain. The first extension has a length ld, and 0 nm?ld?200 nm.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 25, 2022
    Inventors: Clemens Ostermaier, Oliver Haeberlen, Gerhard Prechtl, Manuel Stabentheiner
  • Group III nitride-based transistor device and method of fabricating a gate structure for a group III nitride-based transistor device
    Patent number: 11349012
    Abstract: In an embodiment, a Group III nitride-based transistor device, includes a first. Group III nitride barrier layer arranged on a Group III nitride channel layer, the first Group III nitride barrier layer and the Group III nitride channel layer having differing bandgaps and forming a heterojunction capable of supporting a two-dimensional charge gas. A source, a gate and a drain are on an upper surface of the first Group III nitride barrier layer. A gate recess extends from the upper surface of the first. Group III nitride barrier layer into the first Group III nitride barrier layer. A p-doped Group III nitride material arranged in the gate recess has a first extension extending on the upper surface of the first Group III nitride barrier layer towards the drain. The first extension has a length ld, and 0 nm?ld?200 nm.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: May 31, 2022
    Assignee: Infineon Technologies Austria AG
    Inventors: Clemens Ostermaier, Oliver Haeberlen, Gerhard Prechtl, Manuel Stabentheiner
  • Group III Nitride-Based Transistor Device and Method of Fabricating a Gate Structure for a Group III Nitride-Based Transistor Device
    Publication number: 20200321447
    Abstract: In an embodiment, a Group III nitride-based transistor device, includes a first. Group III nitride barrier layer arranged on a Group III nitride channel layer, the first Group III nitride barrier layer and the Group III nitride channel layer having differing bandgaps and forming a heterojunction. capable of supporting a two-dimensional charge gas. A source, a gate and a drain are on an upper surface of the first Group III nitride barrier layer. A gate recess extends from the upper surface of the first. Group III nitride barrier layer into the first Group III nitride barrier layer. A p-doped Group III nitride material arranged in the gate recess has a first extension extending on the upper surface of the first Group III nitride barrier layer towards the drain. The first extension has a length ld, and 0 nm?ld?200 nm.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 8, 2020
    Inventors: Clemens Ostermaier, Oliver Haeberlen, Gerhard Prechtl, Manuel Stabentheiner