Patents by Inventor Manuel WIERSCH

Manuel WIERSCH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030817
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.
    Type: Application
    Filed: October 3, 2023
    Publication date: January 25, 2024
    Inventors: Manuel WIERSCH, Gerhard THIELE, Antonio PRIEGO, Johann Erich BAYER
  • Patent number: 11881780
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: January 23, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manuel Wiersch, Gerhard Thiele, Antonio Priego, Johann Erich Bayer
  • Patent number: 11804769
    Abstract: In some examples, an apparatus includes a driver having a driver output, a capacitor having a first plate and a second plate, the first plate coupled to the driver output, and a transistor having a transistor gate, a transistor source, and a transistor drain. The apparatus also includes a first switch coupled between the second plate and the transistor gate, a second switch coupled between the second plate and the transistor drain, and a third switch coupled between the transistor gate and the transistor drain.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: October 31, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Eduardas Jodka, Gaetano Maria Walter Petrina, Manuel Wiersch
  • Patent number: 11784568
    Abstract: A switching converter circuit includes a voltage regulation loop configured to provide an output voltage (VOUT) based on an input voltage (VIN). The switching converter circuit also includes a 100% mode circuitry coupled to the voltage regulation loop, wherein the 100% mode circuitry is configured to apply an offset to VOUT in response to detecting that VIN is approaching VOUT.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: October 10, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Antonio Priego, Gerhard Thiele, Manuel Wiersch, Johann Erich Bayer
  • Publication number: 20230198402
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.
    Type: Application
    Filed: February 24, 2023
    Publication date: June 22, 2023
    Inventors: Manuel WIERSCH, Gerhard THIELE, Antonio PRIEGO, Johann Erich BAYER
  • Patent number: 11616439
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: March 28, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manuel Wiersch, Gerhard Thiele, Antonio Priego, Johann Erich Bayer
  • Publication number: 20220209654
    Abstract: In some examples, an apparatus includes a driver having a driver output, a capacitor having a first plate and a second plate, the first plate coupled to the driver output, and a transistor having a transistor gate, a transistor source, and a transistor drain. The apparatus also includes a first switch coupled between the second plate and the transistor gate, a second switch coupled between the second plate and the transistor drain, and a third switch coupled between the transistor gate and the transistor drain.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 30, 2022
    Inventors: Eduardas JODKA, Gaetano Maria Walter PETRINA, Manuel WIERSCH
  • Patent number: 10992229
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: April 27, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Gerhard Thiele, Manuel Wiersch, Antonio Priego, Johann Erich Bayer, Stefan Herzer
  • Patent number: 10965216
    Abstract: An integrated circuit comprising: a high-side pMOSFET comprising a drain and a gate; a node coupled to the drain of the high-side pMOSFET; a voltage-to-current circuit comprising a first nMOSFET and a first resistor, the first nMOSFET comprising a gate and a source, the first resistor comprising a terminal coupled to the source of the first nMOSFET; an error amplifier comprising an output port coupled to the gate of the first nMOSFET; a skip clamp nMOSFET comprising a source coupled to the output port of the error amplifier; and a current limit clamp pMOSFET comprising a source coupled to the output port of the error amplifier.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: March 30, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gerhard Thiele, Manuel Wiersch
  • Publication number: 20200127570
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes a comparator with preamplifier gain adjustment circuitry configured to adjust a preamplifier gain of the comparator based on an overdrive voltage.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 23, 2020
    Inventors: Gerhard THIELE, Manuel WIERSCH, Antonio PRIEGO, Johann Erich BAYER, Stefan HERZER
  • Publication number: 20200106357
    Abstract: An electrical system includes: 1) a buck converter; 2) a battery coupled to an input of the buck converter; and 3) a load coupled to an output of the buck converter. The buck converter includes a high-side switch, a low-side switch, and regulation loop circuitry coupled to the high-side switch and the low-side switch. The regulation loop circuitry includes: 1) a main comparator; 2) a bias current source coupled to the main comparator and configured to provide a bias current to the main comparator; and 3) a dynamic biasing circuit coupled to the main comparator and configured to add a supplemental bias current to the bias current in 100% mode of the buck converter. The supplemental bias current varies depending on an input voltage (VIN) and an output voltage (VOUT) of the buck converter.
    Type: Application
    Filed: October 1, 2019
    Publication date: April 2, 2020
    Inventors: Manuel WIERSCH, Gerhard THIELE, Antonio PRIEGO, Johann Erich BAYER
  • Publication number: 20200106360
    Abstract: A switching converter circuit includes a voltage regulation loop configured to provide an output voltage (VOUT) based on an input voltage (VIN). The switching converter circuit also includes a 100% mode circuitry coupled to the voltage regulation loop, wherein the 100% mode circuitry is configured to apply an offset to VOUT in response to detecting that VIN is approaching VOUT.
    Type: Application
    Filed: September 27, 2019
    Publication date: April 2, 2020
    Inventors: Antonio PRIEGO, Gerhard THIELE, Manuel WIERSCH, Johann Erich BAYER
  • Patent number: 10608538
    Abstract: A device includes a first transistor coupled to a ground node and a current source. The first transistor includes a control terminal coupled to a reference voltage source, where the current source is coupled to an input voltage source. The device includes a second transistor coupled to the input voltage source, where the second transistor includes a control terminal coupled to the first transistor. The device includes a third transistor coupled to the second transistor, where the third transistor includes a control terminal coupled to an output voltage node. The device includes a fourth transistor coupled to the third transistor, where the fourth transistor includes a control terminal coupled to the output voltage node. The device includes a fifth transistor coupled to the fourth transistor and a resistor, where the fifth transistor includes a control terminal coupled to the fourth transistor. The resistor is coupled to the ground node.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: March 31, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Manuel Wiersch, Gerhard Thiele
  • Publication number: 20200099299
    Abstract: An integrated circuit comprising: a high-side pMOSFET comprising a drain and a gate; a node coupled to the drain of the high-side pMOSFET; a voltage-to-current circuit comprising a first nMOSFET and a first resistor, the first nMOSFET comprising a gate and a source, the first resistor comprising a terminal coupled to the source of the first nMOSFET; an error amplifier comprising an output port coupled to the gate of the first nMOSFET; a skip clamp nMOSFET comprising a source coupled to the output port of the error amplifier; and a current limit clamp pMOSFET comprising a source coupled to the output port of the error amplifier.
    Type: Application
    Filed: September 25, 2018
    Publication date: March 26, 2020
    Inventors: Gerhard THIELE, Manuel WIERSCH