Abstract: A memory device includes a memory array and a control logic coupled to the memory array. The memory array includes memory blocks. Each memory block includes memory cell strings, and each memory cell string includes a first memory cell, second memory cells, and a third memory cell. The second memory cells are between the first memory cell and the third memory cell. The first memory cell is coupled to a bit line, the third memory cell is coupled to a source line, the first memory cell is coupled with a first dummy word line, the second memory cells are respectively coupled with second word lines, and the third memory cell is coupled with a third word line.

Abstract: This disclosure provides a memory device, a memory system, and an operation method. The memory device includes a memory array having a plurality of memory blocks and a control circuit coupled to the memory array and used to control the memory array. The control circuit is configured to determine a first average value of threshold voltages of bottom dummy cells in an unused memory block, determine a difference value between the first average value and a first reference value, and judge based on the difference value when bottom dummy cells in the memory block are to be programmed so that the first average value reaches a first threshold.

Abstract: In certain aspects, a memory device includes an array of memory cells, word lines respectively coupled to rows of the memory cells, and a peripheral circuit coupled to the array of memory cells through the word lines and configured to read a select row of the rows of the memory cells. The peripheral circuit includes a word line driver coupled to the select row through a select word line of the word lines and to an unselect row of the rows of the memory cells through an unselect word line of the word lines, and configured to apply a pass voltage to the unselect word line, and discharge the unselect word line from the pass voltage to a first recovery voltage that is greater than a supply voltage of the array of memory cells.

Abstract: This disclosure provides a memory device, a memory system, and an operation method. The memory device includes a memory array having a plurality of memory blocks and a control circuit coupled to the memory array and used to control the memory array. The control circuit is configured to determine a first average value of threshold voltages of bottom dummy cells in an unused memory block, determine a difference value between the first average value and a first reference value, and judge based on the difference value when bottom dummy cells in the memory block are to be programmed so that the first average value reaches a first threshold.