Abstract: A PCIe clock detection circuit includes a clock detector, a clock receiver, a counter coupled to the clock receiver, a multiplexer coupled to the counter, and an AND gate coupled to the clock detector and the multiplexer. The clock detector is used to detect amplitude of a clock signal and generate a clock detection signal accordingly. The clock receiver is used to generate a reference clock signal according to the clock signal. The counter is used to generate a counter signal according to the reference clock signal. The multiplexer is used to generate a MUX output signal according to the counter signal and a reference signal. The AND gate is used to generate a clock detection output signal according to the clock detection signal and the MUX output signal.

Abstract: A multi-input differential amplifier with dynamic transconductance compensation is disclosed. The multi-input differential amplifier includes an input stage, an output stage and a transconductance compensation circuit. The input stage includes a plurality of differential input pairs, which includes a first differential input pair, a second differential input pair, a third differential input pair and a fourth differential input pair, for generating a pair of differential signals according to a first input signal, a second input signal, a third input signal, a fourth input signal, and an output signal. The output stage is utilized to generate the output signal in response to the pair of differential signals. The transconductance compensation circuit is coupled between the first and the second differential input pair, for compensating a first transconductance of the first differential input pair and a second transconductance of the second differential input pair.

Abstract: A multi-input differential amplifier with dynamic transconductance compensation is disclosed. The multi-input differential amplifier includes an input stage, an output stage and a transconductance compensation circuit. The input stage includes a plurality of differential input pairs, which includes a first differential input pair, a second differential input pair, a third differential input pair and a fourth differential input pair, for generating a pair of differential signals according to a first input signal, a second input signal, a third input signal, a fourth input signal, and an output signal. The output stage is utilized to generate the output signal in response to the pair of differential signals. The transconductance compensation circuit is coupled between the first and the second differential input pair, for compensating a first transconductance of the first differential input pair and a second transconductance of the second differential input pair.