Patents by Inventor Mao-Chih Hsia

Mao-Chih Hsia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low power static random access memory
    Patent number: 8659936
    Abstract: A SRAM that keeps the memory cell array under a low voltage in the Standby mode and Write mode, and raises the memory cell array supply voltage to a high voltage in the Read mode. A SRAM comprising: at least one memory cell circuit, comprising a latch circuit with at least two inverters, and comprising two power receiving terminals for receiving power; and a power supplying circuit, for providing the power to the memory cell circuit, such that the voltages at the power receiving terminals of the latch circuit is below a predetermined voltage level when data is written to the latch circuit. In one embodiment, the memory cell circuit includes a plurality of data accessing terminals and the data accessing terminals are respectively controlled by at least two pass-transistor switch devices.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: February 25, 2014
    Assignees: Faraday Technology Corp., National Chiao Tung University
    Inventors: Ching-Te Chuang, Hao-I Yang, Mao-Chih Hsia, Wei Hwang, Chia-Cheng Chen, Wei-Chiang Shih
  • Static random access memory with data controlled power supply
    Patent number: 8320164
    Abstract: A static random access memory with data controlled power supply, which comprises a memory cell circuit and at least one Write-assist circuit, for providing power to the memory cell circuit according to data to be written to the memory cell circuit.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: November 27, 2012
    Assignees: Faraday Technology Corp., National Chiao Tung University
    Inventors: Ching-Te Chuang, Hao-I Yang, Mao-Chih Hsia, Yung-Wei Lin, Chien-Yu Lu, Ming-Hsien Tu, Wei Hwang, Shyh-Jye Jou, Chia-Cheng Chen, Wei-Chiang Shih
  • STATIC RANDOM ACCESS MEMORY WITH DATA CONTROLLED POWER SUPPLY
    Publication number: 20120008377
    Abstract: A static random access memory with data controlled power supply, which comprises a memory cell circuit and at least one Write-assist circuit, for providing power to the memory cell circuit according to data to be written to the memory cell circuit.
    Type: Application
    Filed: January 5, 2011
    Publication date: January 12, 2012
    Inventors: Ching-Te Chuang, Hao-I Yang, Mao-Chih Hsia, Yung-Wei Lin, Chien-Yu Lu, Ming-Hsien Tu, Wei Hwang, Shyh-Jye Jou, Chia-Cheng Chen, Wei-Chiang Shih
  • LOW POWER STATIC RANDOM ACCESS MEMORY
    Publication number: 20120008449
    Abstract: A SRAM that keeps the memory cell array under a low voltage in the Standby mode and Write mode, and raises the memory cell array supply voltage to a high voltage in the Read mode. A SRAM comprising: at least one memory cell circuit, comprising a latch circuit with at least two inverters, and comprising two power receiving terminals for receiving power; and a power supplying circuit, for providing the power to the memory cell circuit, such that the voltages at the power receiving terminals of the latch circuit is below a predetermined voltage level when data is written to the latch circuit. In one embodiment, the memory cell circuit includes a plurality of data accessing terminals and the data accessing terminals are respectively controlled by at least two pass-transistor switch devices.
    Type: Application
    Filed: December 28, 2010
    Publication date: January 12, 2012
    Inventors: Ching-Te Chuang, Hao-I Yang, Mao-Chih Hsia, Wei Hwang, Chia-Cheng Chen, Wei-Chiang Shih