Patents by Inventor Mao-Fu Lai

Mao-Fu Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High density read only memory and fabrication method thereof
    Patent number: 6699759
    Abstract: The invention relates to a high density read only memory and fabrication method thereof through fabricating a plurality of spaced post transistors on a wafer by implanting and trench etching wherein each post transistor has four vertical surfaces with one of vertical surfaces as a short circuit junction between substrate and source and a read only memory (ROM) cell formed on each of the three remaining vertical surfaces. Therefore, the invention can fabricate three ROM cells in a single post transistor having a high density feature for storing three-bit data.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: March 2, 2004
    Assignee: Chinatech Corporation
    Inventor: Mao-Fu Lai
  • High density read only memory and fabrication method thereof
    Publication number: 20030001213
    Abstract: The invention relates to a high density read only memory and fabrication method thereof through fabricating a plurality of spaced post transistors on a wafer by implanting and trench etching wherein each post transistor has four vertical surfaces with one of vertical surfaces as a short circuit junction between substrate and source and a read only memory (ROM) cell formed on each of the three remaining vertical surfaces. Therefore, the invention can fabricate three ROM cells in a single post transistor having a high density feature for storing. three-bit data.
    Type: Application
    Filed: March 25, 2002
    Publication date: January 2, 2003
    Applicant: Chinatech Corporation
    Inventor: Mao-Fu Lai
  • High density read only memory
    Patent number: 6462387
    Abstract: The invention relates to a high density read only memory and fabrication method thereof through fabricating a plurality of spaced post transistors on a wafer by implanting and trench etching wherein each post transistor has four vertical surfaces with one of vertical surfaces as a short circuit junction between substrate and source and a read only memory (ROM) cell formed on each of the three remaining vertical surfaces. Therefore, the invention can fabricate three ROM cells in a single post transistor having a high density feature for storing three-bit data.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: October 8, 2002
    Assignee: Chinatech Corporation
    Inventor: Mao-Fu Lai