Abstract: A pixel circuit is provided. The pixel circuit includes a light emitting element, first to third transistors, first to second capacitors and a voltage setting circuit. The light emitting element receives a system low voltage. The first transistor receives a system high voltage and controlled by an emission signal. The second transistor is coupled between the first transistor and the light emitting device. The first capacitor is coupled to the second transistor. The second capacitor is coupled between the first capacitor and the first transistor. The voltage setting circuit receives first to second scan signals, a source driving signal and a data voltage to remove charges stored in the first capacitor according to the first to second scan signal, and writes the data voltage to the first capacitor according to the source driving signal. The third transistor is controlled by the second scan signal and receives a first reference voltage.

Abstract: A pixel driving circuit includes a first transistor receiving a data signalsame. A first end of a second transistor is connected to the first end of the first transistor, and a gate of the same is connected to a second end of the second transistor. A second end of a third transistor is connected to the second end of the second transistor. A first end of a fourth transistor is connected to the gate of the first transistor. A second end of a fifth transistor is connected to the first end of the first transistor. A first end of the sixth transistor is connected to a second end of the first transistor. An anode of a light emitting diode is connected to a second end of the sixth transistor. A capacitor is connected between the first end and the gate of the first transistor.

Abstract: A display panel and a compensation circuit are provided. The display panel has a periphery region and a display region. The display panel includes pixel columns and a threshold voltage compensation circuit. The pixel columns are disposed in the display region. The threshold voltage compensation circuit is disposed in the periphery region. The threshold voltage compensation circuit receives a compensation voltage, outputs threshold voltage information of a compensation transistor based on the compensation voltage, and generates compensated display data based on the threshold voltage information and display data.

Abstract: A pixel circuit includes a light emitting component, a storage capacitor, a driving transistor, a first switch, a second switch, a third switch, and a fourth switch. A first end of the driving transistor is configured to receive a supply voltage, and a second end of the driving transistor is electrically connected to an anode end of the light emitting component. The first switch is configured to provide a first reference voltage to a second end of the storage capacitor. The second switch is configured to provide the supply voltage to the first end of the storage capacitor. The third switch and the fourth switch are configured to provide an operating voltage corresponding to a data voltage and a threshold voltage of the third switch to the second end of the storage capacitor.

Abstract: An active pixel sensor includes thin-film transistors (TFTs) fabricated on a glass substrate, the TFTs include a gate electrode patterned on the glass substrate; a gate insulator layer disposed over the gate electrode; an amorphous indium-tin-zinc-oxide (a-ITZO) active semi-conductor layer disposed on the gate insulator layer and patterned over the gate electrode; and a source electrode and a drain electrode patterned from a metal layer deposited over the a-ITZO layer.

Abstract: A liquid crystal (LC) pixel circuit of a LC display panel includes a first, a second, a third and a fourth switches, a LC capacitor and a storage capacitor. A first and a control terminals of the first switch respectively receive a common voltage and a first gate signal. A first and a control terminals of the second switch respectively receive a data voltage and a second gate signal. The storage capacitor and the LC capacitor electrically connect between second terminals of the first and second switches. A first and a control terminals of the third switch respectively receive the common voltage and a third gate signal. A first and a control terminals of the fourth switch respectively receive a set voltage and a fourth gate signal. Second terminals of the third and the fourth switches respectively connect to the second terminals of the second and the first switches.

Abstract: A liquid crystal (LC) pixel circuit of a LC display panel includes a first, a second, a third and a fourth switches, a LC capacitor and a storage capacitor. A first and a control terminals of the first switch respectively receive a common voltage and a first gate signal. A first and a control terminals of the second switch respectively receive a data voltage and a second gate signal. The storage capacitor and the LC capacitor electrically connect between second terminals of the first and second switches. A first and a control terminals of the third switch respectively receive the common voltage and a third gate signal. A first and a control terminals of the fourth switch respectively receive a set voltage and a fourth gate signal. Second terminals of the third and the fourth switches respectively connect to the second terminals of the second and the first switches.

Abstract: A pixel circuit of a liquid crystal display (LCD) has a first switch, a second switch, a third switch, a storage capacitor and a liquid crystal capacitor. The first switch controls electrical connection between a data line and the storage capacitor according to a voltage level of a first gate line. The second switch controls electrical connection between the storage capacitor and the liquid crystal capacitor according to a voltage level of a second gate line. The third switch controls electrical connection between a bias line and the liquid crystal capacitor according to the voltage level of the first gate line. Within each frame period of the LCD, the second switch is turned off while the first switch and the third switch are turned on, and the first switch and the third switch are turned off while the second switch is turned on.