Patents by Inventor Maoying LIAO
Maoying LIAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240306446Abstract: A display substrate has a display region and a dummy pixel region including at least one pixel missing region and a redundant region; the display substrate includes a base substrate and a driving circuit layer including a plurality of circuit units, at least one of which includes a pixel driving circuit and initial signal lines; the pixel driving circuit includes first and second pixel driving circuits in the display region and the redundant region, respectively, and a capacitance value of a storage capacitor in the first pixel driving circuit is less than that in the second pixel driving circuit; the initial signal lines include first and second initial signal lines extending along first and second directions, respectively; the first initial signal line is electrically connected to at least a part of the second initial signal lines crossing the first initial signal line.Type: ApplicationFiled: March 31, 2022Publication date: September 12, 2024Inventors: Huijuan YANG, Tingliang LIU, Yi ZHANG, Xiaoqing SHU, Maoying LIAO, Yu WANG
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Publication number: 20240290269Abstract: Provided is a pixel circuit configured to drive, in an Xth frame period, a light emitting device to emit light. The Xth frame period includes Y data writing stages and Z light emitting stages, in which a yth data writing stage includes a first sub-stage to a third sub-stage. The pixel circuit includes: a driving transistor; a first reset module configured to transmit, in the first sub-stage, a first initialization signal to the driving transistor in response to a first scanning signal; a gating module configured to perform, in the second sub-stage, a threshold compensation on the driving transistor in response to a second scanning signal; and an input module configured to transmit, in the third sub-stage, a data signal to the driving transistor in response to a third scanning signal. X, Y, Z and y are positive integers, y?Y, and Y>Z.Type: ApplicationFiled: May 9, 2024Publication date: August 29, 2024Inventors: Tingliang Liu, Lingtong Li, Huijuan Yang, Xiaoqing Shu, Liheng Wei, Maoying Liao, Yi Zhang, Yixuan Long, Nanhao Chen, Peng Xu
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Publication number: 20240292657Abstract: A display substrate and a display device are provided. The display substrate includes a display area and a peripheral area. The display substrate includes: a plurality of subpixels located on the base substrate, at least part of the subpixels located in the display area includes a light-emitting element and a pixel circuit, the light-emitting element includes a light-emitting functional layer and a first electrode and a second electrode on both sides of the light-emitting functional layer in a direction perpendicular to the base substrate, the first electrode is located between the light-emitting functional layer and the base substrate. The pixel circuit includes a driving transistor and a light-emitting control transistor, and the first electrode of the light-emitting element is electrically connected to the light-emitting control transistor. The display substrate further includes a bonding area in the peripheral area and on a first side of the display area.Type: ApplicationFiled: May 31, 2022Publication date: August 29, 2024Inventors: Xiaoqing SHU, Huijuan YANG, Tingliang LIU, Maoying LIAO, Lingtong LI, Liheng WEI, Tinghua SHANG, Biao LIU, Yixuan LONG, Peng XU, Yao HUANG, Binyan WANG
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Patent number: 12073783Abstract: A display panel includes: a pixel driving circuit, a base substrate, a second conductive layer, a third conductive layer. The second conductive layer is disposed on a side of the base substrate, includes first signal lines, orthographic projections of the first signal lines extend in a first direction and spaced apart in a second direction, the first direction and the second direction intersect; the third conductive layer is disposed on a side of the second conductive layer away from the base substrate and includes second signal lines, orthographic projections of the second signal lines extend in the second direction and spaced apart in the first direction; the first signal lines and the second signal lines are configured to provide the same first signal to the pixel driving circuit, part of the first signal lines and the second signal lines are coupled through via holes.Type: GrantFiled: March 30, 2021Date of Patent: August 27, 2024Assignees: CHENGDU OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tinghua Shang, Biao Liu, Tingliang Liu, Huijuan Yang, Maoying Liao, Yi Zhang
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Publication number: 20240221675Abstract: A shift register is configured to be applied to a display substrate including a plurality of rows of sub-pixels. The shift register is electrically connected to a single row of sub-pixels, and is further configured to transmit a scan signal and a reset signal to the single row of sub-pixels. The shift register includes a scan circuit and a reset circuit. The scan circuit is configured to output the scan signal due to cooperation of a first input signal, a first clock signal, a second clock signal, a first voltage signal and a second voltage signal. The reset circuit is configured to output the reset circuit due to cooperation of a second input signal, a third clock signal, a fourth clock signal, a third voltage signal and a fourth voltage signal. The scan circuit and the reset circuit are configured to output signals independently from each other.Type: ApplicationFiled: December 21, 2021Publication date: July 4, 2024Inventors: Huijuan YANG, Maoying LIAO, Bo ZHANG, Xiaoqing SHU, Liheng WEI, Lingtong LI
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Publication number: 20240213263Abstract: The present disclosure relates to a dummy pixel circuit, a display panel, and a display device, which belongs to the field of display. The dummy pixel circuit is applicable to a display panel provided with two through vias and disposed between the two through vias, and the dummy pixel circuit includes a pixel sub-circuit and a dummy sub-circuit. The pixel sub-circuit includes one or more first transistors, wherein a control electrode of the first transistor is electrically connected to the first gate line. The dummy sub-circuit includes one or more second transistors, wherein a control electrode of the dummy sub-circuit is electrically connected to the first gate line, a first electrode of the second transistor is electrically connected to a first electrode of a corresponding one of the one or more first transistors, and a second electrode of the second transistor is electrically connected to a second electrode of the corresponding first transistor.Type: ApplicationFiled: October 29, 2021Publication date: June 27, 2024Inventors: Huijuan YANG, Maoying LIAO, Yang ZHOU, Lu BAI, Jie DAI, Dan CAO
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Patent number: 12014684Abstract: Provided is a pixel circuit configured to drive, in an Xth frame period, a light emitting device to emit light. The Xth frame period includes Y data writing stages and Z light emitting stages, in which a yth data writing stage includes a first sub-stage to a third sub-stage. The pixel circuit includes: a driving transistor; a first reset module configured to transmit, in the first sub-stage, a first initialization signal to the driving transistor in response to a first scanning signal; a gating module configured to perform, in the second sub-stage, a threshold compensation on the driving transistor in response to a second scanning signal; and an input module configured to transmit, in the third sub-stage, a data signal to the driving transistor in response to a third scanning signal. X, Y, Z and y are positive integers, y?Y, and Y?Z.Type: GrantFiled: May 23, 2022Date of Patent: June 18, 2024Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tingliang Liu, Lingtong Li, Huijuan Yang, Xiaoqing Shu, Liheng Wei, Maoying Liao, Yi Zhang, Yixuan Long, Nanhao Chen, Peng Xu
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Publication number: 20240196669Abstract: The display substrate of the present disclosure includes: a substrate having a display side and a back side opposite to each other; a display structure on the display side of the substrate, the display structure including a positive voltage interface for supplying a positive voltage and a plurality of pixel circuits, each pixel circuit including a plurality of transistors; a shielding structure between the substrate and the display structure, the shielding structure being made of a conductive material and electrically coupled to the positive voltage interface; wherein an orthographic projection of active regions of at least a portion of the transistors on the substrate coincides with an orthographic projection of the shielding structure on the substrate; and an insulating isolation layer between the shielding structure and the display structure.Type: ApplicationFiled: October 22, 2021Publication date: June 13, 2024Inventors: Huijuan YANG, Yang ZHOU, Tingliang LIU, Tinghua SHANG, Yu WANG, Maoying LIAO
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Publication number: 20240161699Abstract: A pixel driving circuit includes: a driving transistor connected to a first node, a second node and a third node; a first light-emitting control unit connected to the second node; a second light-emitting control unit connected to the third node and a fourth node; a first reset unit connected to the fourth node, and configured to load a second power supply voltage to the fourth node in response to a scan signal. One end of the light-emitting element is connected to the fourth node, and the other end of the light-emitting element is used for loading the second power supply voltage.Type: ApplicationFiled: November 23, 2021Publication date: May 16, 2024Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Tingliang LIU, Huijuan YANG, Linhong HAN, Xiaoqing SHU, Maoying LIAO, Xiangdan DONG
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Publication number: 20240147792Abstract: An array substrate is provided. The array substrate includes a node connecting line in a same layer as a respective one of the plurality of voltage supply lines, connected to a first capacitor electrode through a first via, and connected to a semiconductor material layer through a second via; and an interference preventing block in a same layer as the second capacitor electrode. Along the first direction, a portion of the node connecting line at a position connecting to the semiconductor material layer through the second via is spaced apart from a first adjacent data line by a first arm, and is spaced apart from a second adjacent data line by a second arm. An orthographic projection of a respective one of the plurality of voltage supply lines on the base substrate substantially covers at least 30% of an orthographic projection of the second arm on the base substrate.Type: ApplicationFiled: January 9, 2024Publication date: May 2, 2024Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Maoying Liao, Yang Zhou, Xin Zhang, Huijuan Yang
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Publication number: 20240130189Abstract: Provided is a display substrate. The display substrate includes: a display region and a bonding region on a side of the display region, wherein the display region includes a plurality of pixel columns; and a wiring structure, disposed between the display region and the bonding region and including a plurality of traces, wherein one of the plurality of traces corresponds to one of the plurality of pixel columns, the plurality of traces are electrically connected to the plurality of pixel columns to supply an electric signal to pixels, and each of the plurality of traces includes a plurality of sub-traces, wherein at least one of line lengths and line widths of sub-traces corresponding to at least a part of the plurality of traces are different, such that total resistances of the at least the part of the plurality of traces are basically equal.Type: ApplicationFiled: October 22, 2021Publication date: April 18, 2024Inventors: Yi QU, Maoying LIAO, Junxiu DAI, Lu BAI, Yang ZHOU, Xin ZHANG
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Patent number: 11910669Abstract: An array substrate is provided. The array substrate includes a node connecting line in a same layer as a respective one of the plurality of voltage supply lines, connected to a first capacitor electrode through a first via, and connected to a semiconductor material layer through a second via; and an interference preventing block in a same layer as the second capacitor electrode. The respective one of the plurality of voltage supply lines is connected to the interference preventing block through a third via. The interference preventing block includes a first arm and a second arm. Along the first direction, a portion of the node connecting line at a position connecting to the semiconductor material layer through the second via is spaced apart from a first adjacent data line by the first arm, and is spaced apart from a second adjacent data line by the second arm.Type: GrantFiled: October 30, 2020Date of Patent: February 20, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Maoying Liao, Yang Zhou, Xin Zhang, Huijuan Yang
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Publication number: 20240038164Abstract: A display panel includes: a pixel driving circuit, a base substrate, a second conductive layer, a third conductive layer. The second conductive layer is disposed on a side of the base substrate, includes first signal lines, orthographic projections of the first signal lines extend in a first direction and spaced apart in a second direction, the first direction and the second direction intersect; the third conductive layer is disposed on a side of the second conductive layer away from the base substrate and includes second signal lines, orthographic projections of the second signal lines extend in the second direction and spaced apart in the first direction; the first signal lines and the second signal lines are configured to provide the same first signal to the pixel driving circuit, part of the first signal lines and the second signal lines are coupled through via holes.Type: ApplicationFiled: March 30, 2021Publication date: February 1, 2024Inventors: Tinghua SHANG, Biao LIU, Tingliang LIU, Huijuan YANG, Maoying LIAO, Yi ZHANG
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Publication number: 20230395025Abstract: Provided is a pixel circuit configured to drive, in an Xth frame period, a light emitting device to emit light. The Xth frame period includes Y data writing stages and Z light emitting stages, in which a yth data writing stage includes a first sub-stage to a third sub-stage. The pixel circuit includes: a driving transistor; a first reset module configured to transmit, in the first sub-stage, a first initialization signal to the driving transistor in response to a first scanning signal; a gating module configured to perform, in the second sub-stage, a threshold compensation on the driving transistor in response to a second scanning signal; and an input module configured to transmit, in the third sub-stage, a data signal to the driving transistor in response to a third scanning signal. X, Y, Z and y are positive integers, y?Y, and Y>Z.Type: ApplicationFiled: May 23, 2022Publication date: December 7, 2023Inventors: Tingliang Liu, Lingtong Li, Huijuan Yang, Xiaoqing Shu, Liheng Wei, Maoying Liao, Yi Zhang, Yixuan Long, Nanhao Chen, Peng Xu
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Publication number: 20230148053Abstract: A display panel includes: a substrate, and a plurality of pixel circuits, an initial signal line and a plurality of light-emitting devices that are disposed on the substrate. The initial signal line is coupled to the plurality of pixel circuits, and includes a plurality of first signal lines and a plurality of second signal lines, the plurality of second signal lines are farther away from the substrate than the plurality of first signal lines, and the plurality of first signal lines are coupled to the plurality of second signal lines. Each light-emitting device of the plurality of light-emitting devices is coupled to a pixel circuit of the plurality of pixel circuits, the light-emitting device includes a first electrode, and orthographic projections of first electrodes of the plurality of light-emitting devices on the substrate do not overlap with orthographic projections of the plurality of second signal lines on the substrate.Type: ApplicationFiled: November 4, 2021Publication date: May 11, 2023Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Maoying LIAO, Hua TIAN, Yi QU, Siyu WANG, Yiding WANG, Huijuan YANG, Tingliang LIU, Yi ZHANG
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Publication number: 20230138949Abstract: An array substrate is provided. The array substate includes a base substrate; a semiconductor material layer on the base substrate; and a plurality of voltage supply lines on a side of the semiconductor material layer away from the base substrate. In a respective subpixel, the semiconductor material layer includes an active layer of a third transistor, an active layer of a fifth transistor, an active layer of a driving transistor, and a third node portion that is connected to the active layer of the third transistor, the active layer of the fifth transistor, and the active layer of the driving transistor in the respective subpixel. At least 30% of an orthographic projection of the third node portion on the base substrate is non-overlapping with an orthographic projection of a respective voltage supply line on the base substrate.Type: ApplicationFiled: January 29, 2021Publication date: May 4, 2023Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Siyu Wang, Yi Zhang, Chang Luo, Yang Xu, Jiaxing Chen, Maoying Liao, Junxiu Dai, Yi Qu
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Publication number: 20220383816Abstract: A pixel circuit includes: a data writing circuit configured to write a data voltage provided by a a data line to a second node; a light emission control circuit configured to control connection/disconnection between a third node and a first electrode of a light-emitting device; a reset compensation circuit configured to connect a first node to the third node, write a voltage at the first electrode of the light-emitting device to the first node when the third node is connected to the first electrode of the light-emitting device to reset the first node, acquire a threshold voltage of the driving transistor when the third node is disconnected from the first electrode of the light-emitting device, write a first voltage to the second node, and write a light emission voltage to the first node; and a driving transistor configured to generate a driving current according to the light emission voltage.Type: ApplicationFiled: June 17, 2021Publication date: December 1, 2022Inventors: Guo LIU, Ziyang YU, Maoying LIAO
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Publication number: 20220352287Abstract: An array substrate is provided. The array substrate includes a node connecting line in a same layer as a respective one of the plurality of voltage supply lines, connected to a first capacitor electrode through a first via, and connected to a semiconductor material layer through a second via; and an interference preventing block in a same layer as the second capacitor electrode. The respective one of the plurality of voltage supply lines is connected to the interference preventing block through a third via. The interference preventing block includes a first arm and a second arm. Along the first direction, a portion of the node connecting line at a position connecting to the semiconductor material layer through the second via is spaced apart from a first adjacent data line by the first arm, and is spaced apart from a second adjacent data line by the second arm.Type: ApplicationFiled: October 30, 2020Publication date: November 3, 2022Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Maoying Liao, Yang Zhou, Xin Zhang, Huijuan Yang
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Publication number: 20220320231Abstract: A display substrate and a display device. In the display substrate, at least one of the inter-opening region, the first opening peripheral region and the second opening peripheral region includes a first virtual sub-pixel; the first signal line extends along a first direction and includes a first portion passing through the first opening peripheral region, the inter-opening region and the second opening peripheral region; the first portion passes through the first virtual sub-pixel, and the first virtual sub-pixel includes a first compensation capacitor, a first plate of the first compensation capacitor is in a same layer as the first portion of the first signal line and electrically connected with the first portion of the first signal line, and in a same layer as the second plate of the storage capacitor; the second plate is in a different layer from, insulated from, and overlaps with the first plate.Type: ApplicationFiled: September 10, 2020Publication date: October 6, 2022Inventors: Xin ZHANG, Yang ZHOU, Junxiu DAI, Maoying LIAO, Yi ZHANG, Xiaoqing SHU, Hongwei MA, Mengmeng DU, Rong WANG, Xiangdan DONG, Zhenhua ZHANG, Shuangbin YANG, Bo CHENG, Yujing LI
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Publication number: 20220320230Abstract: A display substrate and a display device. A first opening region includes a first opening and a first opening peripheral region surrounding the first opening; a display region surrounds the first opening region, the first signal lines, extend along the first direction; the second signal lines extend along a second direction; the second signal lines pass through the first opening peripheral region along the second direction, each second signal line includes a longitudinal winding portion in the first opening peripheral region; the longitudinal winding portion partially surrounds the first opening; the longitudinal winding portion closest to the first opening among longitudinal winding portion of the plurality of second signal lines is an edge longitudinal winding portion, and the first floating electrode is in a same layer as the edge longitudinal winding portion and is at a side of the edge longitudinal winding portion close to the first opening.Type: ApplicationFiled: September 10, 2020Publication date: October 6, 2022Inventors: Bo ZHANG, Xiaoqing SHU, Zhenhua ZHANG, Rong WANG, Zhenggang WU, Xin ZHANG, Yang ZHOU, Junxiu DAI, Maoying LIAO, Yi ZHANG