Patents by Inventor Mararu Osanai

Mararu Osanai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit device having a signal transmission line pair interconnected by propagation delay time control resistance
    Patent number: 5214318
    Abstract: A semiconductor integrated circuit device has, in one embodiment, a pair of signal transmission lines formed over and insulated from a semiconductor substrate, a first circuit formed in the semiconductor substrate and electrically connected with one end of the pair of signal transmission lines for sending an electric signal, and a second circuit formed in the semiconductor substrate and electrically connected with the other end of the pair of signal transmission lines for receiving the electric signal propagating over the transmission line pair. A control resistance is electrically connected between the pair of transmission lines at the above-mentioned other end for controlling a delay time of the signal propagating over the pair of signal transmission lines between the opposite ends of the pair of signal transmission lines.
    Type: Grant
    Filed: January 7, 1991
    Date of Patent: May 25, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Keiichirou Nakanishi, Mararu Osanai, Minoru Yamada, Masakazu Yamamoto, Akira Masaki, Mitsuo Usami