Patents by Inventor Marc A. Rossow

Marc A. Rossow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160049303
    Abstract: A method of forming a semiconductor structure uses a substrate. A first insulating layer is formed over the substrate. An amorphous silicon layer is formed over the first insulating layer. Heat is applied to the amorphous silicon layer to form a plurality of seed nanocrystals over the first insulating layer. Silicon is epitaxially grown on the plurality of seed nanocrystals to leave resulting nanocrystals.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 18, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: EUHNGI LEE, CHEONG M. HONG, SUNG-TAEG KANG, MARC A. ROSSOW
  • Patent number: 8884358
    Abstract: A non-volatile memory device includes a substrate and a charge storage layer. The charge storage layer comprises a bottom layer of oxide, a layer of discrete charge storage elements on the bottom layer of oxide, and a top layer of oxide on the charge storage elements. A control gate is on the top layer of oxide. A surface of the top layer of oxide facing a surface of the control gate is substantially planar.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: November 11, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Brian A. Winstead, Sung-Taeg Kang, Marc A. Rossow
  • Publication number: 20140203347
    Abstract: A non-volatile memory device includes a substrate and a charge storage layer. The charge storage layer comprises a bottom layer of oxide, a layer of discrete charge storage elements on the bottom layer of oxide, and a top layer of oxide on the charge storage elements. A control gate is on the top layer of oxide. A surface of the top layer of oxide facing a surface of the control gate is substantially planar.
    Type: Application
    Filed: January 24, 2013
    Publication date: July 24, 2014
    Inventors: BRIAN A. WINSTEAD, SUNG-TAEG KANG, MARC A. ROSSOW
  • Patent number: 8021970
    Abstract: A method includes forming a first dielectric layer over a substrate; forming nanoclusters over the first dielectric layer; forming a second dielectric layer over the nanoclusters; annealing the second dielectric layer using nitrous oxide; and after the annealing the second dielectric layer, forming a gate electrode over the second dielectric layer.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: September 20, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jinmiao J. Shen, Cheong M. Hong, Sung-Taeg Kang, Marc A Rossow
  • Publication number: 20110223706
    Abstract: A photodetector is formed to have a germanium detector on a waveguide. The germanium detector has a first surface on the waveguide and a second surface that, when exposed to ambient conditions, forms germanium oxide. In a processing platform, an oxygen-free plasma is applied to the second surface. The oxygen-free plasma removes oxygen that is bonded to germanium at the second surface. A cap layer is formed on the second surface prior to removing the germanium detector from the processing platform.
    Type: Application
    Filed: March 10, 2010
    Publication date: September 15, 2011
    Inventors: JILL C. HILDRETH, Stanley M. Filipiak, Marc A. Rossow, Gregory S. Spencer, Bret T. Wilkerson
  • Publication number: 20100240206
    Abstract: A method includes forming a first dielectric layer over a substrate; forming nanoclusters over the first dielectric layer; forming a second dielectric layer over the nanoclusters; annealing the second dielectric layer using nitrous oxide; and after the annealing the second dielectric layer, forming a gate electrode over the second dielectric layer.
    Type: Application
    Filed: March 20, 2009
    Publication date: September 23, 2010
    Inventors: Jinmiao J. Shen, Cheong M. Hong, Sung-Taeg Kang, Marc A. Rossow
  • Patent number: 7799634
    Abstract: Nanocrystals are formed over an insulating layer by depositing a semiconductor layer over the insulating layer. The semiconductor layer is annealed to form a plurality of globules from the semiconductor layer. The globules are annealed using oxygen. Semiconductor material is deposited on the plurality of globules to add semiconductor material to the globules. After depositing the semiconductor material, the globules are annealed to form the nanocrystals. The nanocrystals can then be used in a storage layer of a non-volatile memory cell, especially a split-gate non-volatile memory cell having a select gate over the nanocrystals and a control gate adjacent to the select gate.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: September 21, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jinmiao J. Shen, Horacio P. Gasquet, Sung-Taeg Kang, Marc A. Rossow
  • Publication number: 20100159651
    Abstract: Nanocrystals are formed over an insulating layer by depositing a semiconductor layer over the insulating layer. The semiconductor layer is annealed to form a plurality of globules from the semiconductor layer. The globules are annealed using oxygen. Semiconductor material is deposited on the plurality of globules to add semiconductor material to the globules. After depositing the semiconductor material, the globules are annealed to form the nanocrystals. The nanocrystals can then be used in a storage layer of a non-volatile memory cell, especially a split-gate non-volatile memory cell having a select gate over the nanocrystals and a control gate adjacent to the select gate.
    Type: Application
    Filed: December 19, 2008
    Publication date: June 24, 2010
    Inventors: Jinmiao J. Shen, Horacio P. Gasquet, Sung-Taeg Kang, Marc A. Rossow
  • Patent number: 7125805
    Abstract: A semiconductor fabrication process includes forming a gate electrode overlying a substrate. A first silicon nitride spacer is formed adjacent the gate electrode sidewalls and a disposable silicon nitride spacer is then formed adjacent the offset spacer. An elevated source/drain structure, defined by the boundaries of the disposable spacer, is then formed epitaxially. The disposable spacer is then removed to expose the substrate proximal to the gate electrode and a shallow implant, such as a halo or extension implant, is introduced into the exposed substrate proximal the gate electrode. A replacement spacer is formed substantially where the disposable spacer existed a source/drain implant is done to introduce a source/drain impurity distribution into the elevated source drain. The gate electrode may include an overlying silicon nitride capping layer and the first silicon nitride spacer may contact the capping layer to surround the polysilicon gate electrode in silicon nitride.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: October 24, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jian Chen, Rode R. Mora, Marc A. Rossow, Yasuhito Shiho