Abstract: A semiconductor device includes a fin structure including a recess formed in an upper surface of the fin structure, an inner gate formed in the recess of the fin structure, and an outer gate formed outside and around the fin structure.

Abstract: A semiconductor device including a fin structure including a recess, a first gate formed in the recess of the fin structure, and a second gate formed outside the fin structure.

Abstract: A semiconductor device including a fin structure including a recess, a first gate formed in the recess of the fin structure, and a second gate formed outside the fin structure.

Abstract: A semiconductor device includes a fin structure including a cylindrical shape, an inner gate formed inside the fin structure, and an outer gate formed outside the fin structure and connected to the inner gate.

Abstract: A semiconductor device includes a fin structure including a recess formed in an upper surface of the fin structure, an inner gate formed in the recess of the fin structure, and an outer gate formed outside and around the fin structure.

Abstract: A semiconductor device includes a fin structure having a circular cylindrical shape, and including a first recess formed on a first side of the fin structure and a second recess formed on a second side of the fin structure opposite the first side, an inner gate formed inside the fin structure, and an inner gate insulating layer formed between the inner gate and an inner surface of the fin structure.

Abstract: A system for performing diffraction analysis, includes a mill for removing a surface portion of a sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A semiconductor device includes a fin structure having a circular cylindrical shape, and including a first recess formed on a first side of the fin structure and a second recess formed on a second side of the fin structure opposite the first side, an inner gate formed inside the fin structure, and an inner gate insulating layer formed between the inner gate and an inner surface of the fin structure.

Abstract: A semiconductor device includes a fin structure including a cylindrical shape, an inner gate formed inside the fin structure, and an outer gate formed outside the fin structure and connected to the inner gate.

Abstract: A semiconductor device includes a fin structure including a cylindrical shape, an inner gate formed inside the fin structure, and an outer gate formed outside the fin structure and connected to the inner gate.

Abstract: A system for performing diffraction analysis, includes a mill for removing a surface portion of a sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A system for performing diffraction analysis, includes a focused ion beam (FIB) device for preparing a sample, a mill for removing a surface portion of the prepared sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A system for performing diffraction analysis, includes a focused ion beam (FIB) device for preparing a sample, a mill for removing a surface portion of the prepared sample, and an analyzer for performing diffraction analysis on the milled sample.

Abstract: A system for performing nano beam diffraction (NBD) analysis, includes a focused ion beam (FIB) device for preparing a transmission electron microscopy (TEM) sample, a broad beam ion mill for milling the TEM sample to remove a surface portion of the TEM sample, and a strain analyzer for performing NBD analysis on the milled TEM sample to acquire diffraction data.

Abstract: A semiconductor device includes a fin structure including a cylindrical shape, an inner gate formed inside the fin structure, and an outer gate formed outside the fin structure and connected to the inner gate.

Abstract: A semiconductor device includes a fin structure comprising a cylindrical shape and including a recess formed in an upper surface of the fin structure, an inner gate formed inside the fin structure, an outer gate formed outside the fin structure, and a conductor formed in the recess and connecting the inner and outer gates.

Abstract: A system for performing nano beam diffraction (NBD) analysis, includes a focused ion beam (FIB) device for preparing a transmission electron microscopy (TEM) sample, a broad beam ion mill for milling the TEM sample to remove a surface portion of the TEM sample, and a strain analyzer for performing NBD analysis on the milled TEM sample to acquire diffraction data.

Abstract: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.

Abstract: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.

Abstract: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.