Patents by Inventor Marc Asher De Kruijf

Marc Asher De Kruijf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computer processor providing exception handling with reduced state storage
    Patent number: 9619233
    Abstract: A computer architecture allows for simplified exception handling by restarting the program after exceptions at the beginning of idempotent regions, the idempotent regions allowing re-execution without the need for restoring complex state information from checkpoints. Recovery from mis-speculation may be provided by a similar mechanism but using smaller idempotent regions reflecting a more frequent occurrence of mis-speculation. A compiler generating different idempotent regions for speculation and exception handling is also disclosed.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: April 11, 2017
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Jaikrishnan Menon, Marc Asher De Kruijf, Karthikeyan Sankaralingam
  • Computer Processor Providing Exception Handling with Reduced State Storage
    Publication number: 20160170765
    Abstract: A computer architecture allows for simplified exception handling by restarting the program after exceptions at the beginning of idempotent regions, the idempotent regions allowing re-execution without the need for restoring complex state information from checkpoints. Recovery from mis-speculation may be provided by a similar mechanism but using smaller idempotent regions reflecting a more frequent occurrence of mis-speculation. A compiler generating different idempotent regions for speculation and exception handling is also disclosed.
    Type: Application
    Filed: February 19, 2016
    Publication date: June 16, 2016
    Inventors: Jaikrishnan Menon, Marc Asher De Kruijf, Karthikeyan Sankaralingam
  • Computer processor providing exception handling with reduced state storage
    Patent number: 9298497
    Abstract: A computer architecture allows for simplified exception handling by restarting the program after exceptions at the beginning of idempotent regions, the idempotent regions allowing re-execution without the need for restoring complex state information from checkpoints. Recovery from mis-speculation may be provided by a similar mechanism but using smaller idempotent regions reflecting a more frequent occurrence of mis-speculation. A compiler generating different idempotent regions for speculation and exception handling is also disclosed.
    Type: Grant
    Filed: July 13, 2012
    Date of Patent: March 29, 2016
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Jaikrishnan Menon, Marc Asher De Kruijf, Karthikeyan Sankaralingam
  • Computer processor providing error recovery with idempotent regions
    Patent number: 9244772
    Abstract: A computer architecture allows for simplified recovery after mis-speculation during speculative execution by controlling speculation to occur within idempotent regions that may be recovered by re-execution of the region without the need for restoring complex state information from checkpoints. A compiler for increasing the size of idempotent regions is also disclosed.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: January 26, 2016
    Assignee: National Science Foundation
    Inventors: Karthikeyan Sankaralingam, Marc Asher De Kruijf, Chen-Han Ho
  • Computer Processor Providing Exception Handling with Reduced State Storage
    Publication number: 20140019735
    Abstract: A computer architecture allows for simplified exception handling by restarting the program after exceptions at the beginning of idempotent regions, the idempotent regions allowing re-execution without the need for restoring complex state information from checkpoints. Recovery from mis-speculation may be provided by a similar mechanism but using smaller idempotent regions reflecting a more frequent occurrence of mis-speculation. A compiler generating different idempotent regions for speculation and exception handling is also disclosed.
    Type: Application
    Filed: July 13, 2012
    Publication date: January 16, 2014
    Inventors: Jaikrishnan Menon, Marc Asher De Kruijf, Karthikeyan Sankaralingam
  • Computer Processor Providing Error Recovery with Idempotent Regions
    Publication number: 20120284562
    Abstract: A computer architecture allows for simplified recovery after mis-speculation during speculative execution by controlling speculation to occur within idempotent regions that may be recovered by re-execution of the region without the need for restoring complex state information from checkpoints. A compiler for increasing the size of idempotent regions is also disclosed.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 8, 2012
    Inventors: Karthikeyan Sankaralingam, Marc Asher De Kruijf, Chen-Han Ho