Patents by Inventor Marc Chason

Marc Chason has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060006817
    Abstract: An alternating current (AC) powered self organizing wireless node (100, 400, 600) includes a self organizing wireless receiver-transmitter (115), an AC branch connection (105), an AC to direct current (DC) converter (110), a secondary power function (120), and a housing (150). The self organizing wireless receiver-transmitter can communicate information throughout a network of compatible self organizing nodes solely using radio transmission to and reception from nearby self-organizing nodes. The secondary power function can couple power to the AC to DC converter for powering the self organizing wireless receiver-transmitter when AC power is not provided. The AC powered self organizing wireless node is designed and fabricated for agency certification. The AC powered self organizing wireless node may include one or more sensors (125), sensor inputs (135), transducers (130), or control outputs (155).
    Type: Application
    Filed: May 11, 2005
    Publication date: January 12, 2006
    Inventors: Marc Chason, Janice Danvir, Katherine Devanie, David Hume, Tomasz Klosowiak, Kevin McDunn
  • Publication number: 20040232430
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: June 29, 2004
    Publication date: November 25, 2004
    Applicant: Motorola, Inc.
    Inventors: Robert Lempkowski, Marc Chason
  • Patent number: 6800946
    Abstract: The invention provides a method for attaching a flip chip to a printed wiring board. A bumped opto-electronic or electromechanical flip chip is provided. An underfill material is applied to a first portion of the flip chip, wherein a second portion of the flip chip is free of the underfill material. The flip chip is positioned on a printed wiring board, and a bumped portion of the flip chip is heated to electrically connect the flip chip to the printed wiring board. The second portion of the flip chip remains free of the underfill material when the flip chip is electrically connected to the printed wiring board.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: October 5, 2004
    Assignee: Motorola, Inc
    Inventors: Marc Chason, Jan Danvir
  • Patent number: 6780733
    Abstract: A wafer (10) having integrated circuit elements formed therein is thinned and a first carrier (41) is adhered thereto. The first carrier (41) facilitates handling of the thinned wafer (30). A second carrier (51) is then adhered as well and the various integrated circuits are singulated to yield a plurality of thinned die (81). Once the thinned die is mounted to a desired substrate (91), the first carrier (41) is readily removed. In one embodiment, the first carrier (41) has an adhesive that becomes less adherent when exposed to a predetermined stimulus (such as a given temperature range or a given frequency range of photonic energy). Such thinned die (or modules containing such die) are readily amenable to stacking in order to achieve significantly increased circuit densities.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: August 24, 2004
    Assignee: Motorola, Inc.
    Inventors: Marc Chason, Paul Brazis, Krishna Kalyanasundaram, Daniel Gamota
  • Publication number: 20040118599
    Abstract: The invention provides a method for attaching a flip chip to a printed wiring board. A bumped opto-electronic or electromechanical flip chip is provided. An underfill material is applied to a first portion of the flip chip, wherein a second portion of the flip chip is free of the underfill material. The flip chip is positioned on a printed wiring board, and a bumped portion of the flip chip is heated to electrically connect the flip chip to the printed wiring board. The second portion of the flip chip remains free of the underfill material when the flip chip is electrically connected to the printed wiring board.
    Type: Application
    Filed: December 23, 2002
    Publication date: June 24, 2004
    Applicant: MOTOROLA, INC.
    Inventors: Marc Chason, Jan Danvir
  • Publication number: 20040048445
    Abstract: A wafer (10) having integrated circuit elements formed therein is thinned and a first carrier (41) is adhered thereto. The first carrier (41) facilitates handling of the thinned wafer (30). A second carrier (51) is then adhered as well and the various integrated circuits are singulated to yield a plurality of thinned die (81). Once the thinned die is mounted to a desired substrate (91), the first carrier (41) is readily removed. In one embodiment, the first carrier (41) has an adhesive that becomes less adherent when exposed to a predetermined stimulus (such as a given temperature range or a given frequency range of photonic energy). Such thinned die (or modules containing such die) are readily amenable to stacking in order to achieve significantly increased circuit densities.
    Type: Application
    Filed: September 6, 2002
    Publication date: March 11, 2004
    Applicant: Motorola, Inc.
    Inventors: Marc Chason, Paul Brazis, Krishna Kalyanasundaram, Daniel Gamota
  • Patent number: 6649852
    Abstract: The organic MEMS according to the present invention comprises a polymeric substrate comprising a substrate surface including a first region and a second region. A polymer coating is applied to the first region to provide a coating surface that is spaced apart from the substrate surface. A terminal is disposed on the second region. A metallic trace is affixed to the coating surface such that the metallic trace forms a flexible extension over the second region. The extension has a rest position where the extension is spaced apart from the terminal, and a flexed position where the extension is disposed towards the terminal. An actuator is used to provide an electric field to deflect the extension from the rest position to the flexed position. By changing the spacing between the extension and the terminal, it is possible to change the electrical condition provided by the MEMS.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: November 18, 2003
    Assignee: Motorola, Inc.
    Inventors: Marc Chason, Andrew Skipor, Aroon Tungare, Daniel Gamota, Sanjar Ghaem
  • Publication number: 20030188958
    Abstract: The organic MEMS according to the present invention comprises a polymeric substrate comprising a substrate surface including a first region and a second region. A polymer coating is applied to the first region to provide a coating surface that is spaced apart from the substrate surface. A terminal is disposed on the second region. A metallic trace is affixed to the coating surface such that the metallic trace forms a flexible extension over the second region. The extension has a rest position where the extension is spaced apart from the terminal, and a flexed position where the extension is disposed towards the terminal. An actuator is used to provide an electric field to deflect the extension from the rest position to the flexed position. By changing the spacing between the extension and the terminal, it is possible to change the electrical condition provided by the MEMS.
    Type: Application
    Filed: April 4, 2003
    Publication date: October 9, 2003
    Inventors: Marc Chason, Andrew Skipor, Aroon Tungare, Daniel Gamota, Sanjar Ghaem
  • Publication number: 20030132513
    Abstract: An interposer-based semiconductor package (40) having at least one semiconductor die (21) attached to one side thereof also has, prior to placement on a printed wiring board (61), an underfill material (31) disposed at least partially thereon. Depending upon the embodiment, the underfill material (31) may initially cover interface electrodes (12) on the interposer (11). Such material (31) can be selectively removed to partially expose the interface electrodes (12). In other embodiments, apertures (101) can be left in the underfill material (31) during deposition, or formed after the underfill material (31) has been deposited, and the interface electrodes (12) subsequently formed in the apertures (101). Deposition of the underfill material (31) can be done with a single interposer-based package (40) or simultaneously with a plurality of such packages. Once deposited, the underfill material can be processed to render it relatively stable an substantially non-tacky.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 17, 2003
    Applicant: Motorola, Inc.
    Inventors: Marc Chason, Janice Danvir, Jing Qi, Nadia Yala
  • Patent number: 6585424
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown layered monocrystallinfe substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. Formation of a compliant substrate may include utilizing surfactant-enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. The layered monocrystalline substrates allow for the fabrication of at least one optical device with an insulating material laid over it, wherein the insulating material provides an optical aperture for use with the optical device. A conductive material can be deposited within the insulating material, and an electro-rheological lens can be inserted within the insulating material aperture, while being in contact with the conductive material.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: July 1, 2003
    Assignee: Motorola, Inc.
    Inventors: Marc Chason, Daniel Gamota
  • Publication number: 20030102473
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying a monocrystalline layer of silicon formed on a low cost substrate, such as glass. The growth of the monocrystalline materials is accomplished by forming a compliant substrate for growing the monocrystalline materials. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon layer is taken care of by the amorphous interface layer.
    Type: Application
    Filed: August 15, 2001
    Publication date: June 5, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Marc Chason, George Valliath, William J. Ooms
  • Publication number: 20030034239
    Abstract: The organic MEMS according to the present invention comprises a polymeric substrate comprising a substrate surface including a first region and a second region. A polymer coating is applied to the first region to provide a coating surface that is spaced apart from the substrate surface. A terminal is disposed on the second region. A metallic trace is affixed to the coating surface such that the metallic trace forms a flexible extension over the second region. The extension has a rest position where the extension is spaced apart from the terminal, and a flexed position where the extension is disposed towards the terminal. An actuator is used to provide an electric field to deflect the extension from the rest position to the flexed position. By changing the spacing between the extension and the terminal, it is possible to change the electrical condition provided by the MEMS.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 20, 2003
    Inventors: Marc Chason, Andrew Skipor, Aroon Tungare, Daniel Gamota, Sanjar Ghaem
  • Publication number: 20030034491
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 20, 2003
    Applicant: Motorola, Inc.
    Inventors: Robert Lempkowski, Marc Chason
  • Publication number: 20030022414
    Abstract: A opto-electronic semiconductor structure having an electrochromic switch includes a monocrystalline silicon substrate and an amorphous oxide material overlying the monocrystalline silicon substrate. A monocrystalline perovskite oxide material overlies the amorphous oxide material and a monocrystalline compound semiconductor material overlies the monocrystalline perovskite oxide material. An optical source component that is adapted to transmit radiant energy may be formed within the monocrystalline compound semiconductor material. An electrochromic switch may be optically coupled to the optical source component. An optical detector component that is adapted to receive radiant energy may be formed within the monocrystalline compound semiconductor material. An electrochromic switch may be optically coupled to the optical detector component.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 30, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Keryn Lian, Marc Chason, Daniel Gamota, Barbara Foley Barenburg
  • Publication number: 20030021549
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown layered monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. Formation of a compliant substrate may include utilizing surfactant-enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials. The layered monocrystalline substrates allow for the fabrication of at least one optical device with an insulating material laid over it, wherein the insulating material provides an optical aperture for use with the optical device. A conductive material can be deposited within the insulating material, and an electro-rheological lens can be inserted within the insulating material aperture, while being in contact with the conductive material.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 30, 2003
    Applicant: MOTOROLA, INC.
    Inventors: Marc Chason, Daniel Gamota
  • Publication number: 20030015705
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: July 17, 2001
    Publication date: January 23, 2003
    Applicant: Motorola, Inc.
    Inventors: Marc Chason, Daniel Gamota, Robert Lempkowski
  • Publication number: 20030017690
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: July 18, 2001
    Publication date: January 23, 2003
    Applicant: MOTOROLA, INC.
    Inventor: Marc Chason
  • Publication number: 20030015722
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant-enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: July 17, 2001
    Publication date: January 23, 2003
    Applicant: Motorola, Inc.
    Inventors: Marc Chason, Daniel Gamota, Robert Lempkowski
  • Publication number: 20030013218
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.
    Type: Application
    Filed: July 10, 2001
    Publication date: January 16, 2003
    Applicant: Motorola, Inc.
    Inventor: Marc Chason
  • Patent number: 5847920
    Abstract: A capacitor (100) includes first and second electrodes (102, 103) an adhesive electrolyte (125) positioned therebetween. The adhesive electrolyte (125) includes an organic polymer and an inorganic component, which is either a polyacid or a polysalt.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: December 8, 1998
    Assignee: Motorola, Inc.
    Inventors: Changming Li, Robert H. Reuss, Marc Chason