Abstract: An adapter for connecting an embedded system to a control computer having a standard interface, in particular a network interface, a first subcircuit, and a second subcircuit, the first subcircuit being designed to communicate with the control computer via the standard interface by means of a standard protocol, preferably XCP. The first subcircuit is designed to convert a protocol functionality requested in the standard protocol via the standard interface, out of a set of supported protocol functionalities into the call for one or more elementary functions out of a defined overall set of elementary functions. The first subcircuit is connected to the second subcircuit via an internal interface, wherein the second subcircuit has a programmable computing module which is configured to provide at least one elementary function out of the overall set of elementary functions which can be called up via the internal interface by means of a call.

Abstract: An adapter for connecting an embedded system to a control computer having a standard interface, in particular a network interface, a first subcircuit, and a second subcircuit, the first subcircuit being designed to communicate with the control computer via the standard interface by means of a standard protocol, preferably XCP. The first subcircuit is designed to convert a protocol functionality requested in the standard protocol via the standard interface, out of a set of supported protocol functionalities into the call for one or more elementary functions out of a defined overall set of elementary functions. The first subcircuit is connected to the second subcircuit via an internal interface, wherein the second subcircuit has a programmable computing module which is configured to provide at least one elementary function out of the overall set of elementary functions which can be called up via the internal interface by means of a call.

Abstract: A method is disclosed for creating a netlist for the configuration of an FPGA, wherein the code of a first program comprises a multiplicity of subroutines. The code of the first program can be combined with the code of a second program to form a third program. A netlist for the configuration of an FPGA can be created from the third program, wherein at least one first subroutine of the first program is not used at the runtime of the third program. The first subroutine can be recognized in an automated manner, and a fourth program can be created on the basis of the first program. Also, the first subroutine can be removed during the creation of the fourth program, such that the fourth program does not contain the first subroutine.

Abstract: A method for manipulating a first function of a control program of an electronic control device, using a second function. The control program is processed using a first calculation kernel of a processor, and the second function is processed by a second calculation kernel during the processing of the control program. The first function assigns a first value to a variable and writes the first value to the storage address of the variable at a first time. The second function assigns a second value to the variable, which value is written to the storage address of the variable at a second time, wherein the second value written by the first function is overwritten. At a third time, the control program reads the second value from the storage address of the variable. A control entity coordinates the times at which the storage address of the variable is accessed.

Abstract: In a method for changing a configuration of a programmable logic module, an initial configuration of the programmable logic module is read in, with a result that a logic description, in particular a mapped netlist, of the initial configuration is at least partially available. One or more logic elements and/or connection elements from the logic description of the initial configuration of the programmable logic module are replaced or reconfigured and a logic description of a target configuration having one or more additional logic elements are created, none or a plurality of elements of the initial configuration being missing in the target configuration.

Abstract: An arrangement for disabling a configuration of a first programmable hardware component, having the first programmable hardware component, a second programmable hardware component, and a switching element. The first programmable hardware component has a configuration interface for configuring a logic of the first programmable hardware component, a data interface for communication of the logic with the second programmable hardware component, a debugging interface for debugging and configuring the logic, and a configuration monitoring interface for signaling a configuration process of the logic. The switching element is designed and connected to the debugging interface such that access to the debugging interface during a configuration process of the logic can be disabled.

Abstract: An arrangement for the partial release of a debug interface of a programmable hardware component, whereby a first logic for the programmable hardware component can be stored in a configuration memory and a configuration device is designed to program the programmable hardware component via a configuration interface of the programmable hardware component according to the first logic. The configuration device is further designed to register a programming process of the programmable hardware component which occurs via the debug interface according to a second logic and, upon termination of the programming process occurring via the debug interface, reprograms the programmable hardware component according to the first logic.

Abstract: A method for changing software in a memory of an electronic control unit, wherein each memory address from the overlay memory can be assigned to a memory address in the read-only memory by an assignment information item. During a run time of the control unit, at least a functional part of a bypass routine that is to at least partially replace an original program routine is stored in an address range in the overlay memory, or a jump instruction is stored in the overlay memory as the first part of a bypass routine that refers to a second part of the bypass routine that is stored in an address range accessible to the processor. To activate an overlay functionality the address and/or the address range of the overlay memory are assigned to an address or address range of the program routine to be replaced.

Abstract: In a method for changing the configuration of a programmable logic module, an initial configuration of the programmable logic module is read in, with the result that a logic description, in particular a mapped netlist, of the initial configuration is at least partially available. One or more logic elements and/or connection elements from the logic description of the initial configuration of the programmable logic module are replaced or reconfigured and a logic description of a target configuration having one or more additional logic elements is created, none or a plurality of elements of the initial configuration being missing in the target configuration.

Abstract: A method for manipulating a first function of a control program of an electronic control device, using a second function. The control program is processed using a first calculation kernel of a processor, and the second function is processed by a second calculation kernel during the processing of the control program. The first function assigns a first value to a variable and writes the first value to the storage address of the variable at a first time. The second function assigns a second value to the variable, which value is written to the storage address of the variable at a second time, wherein the second value written by the first function is overwritten. At a third time, the control program reads the second value from the storage address of the variable. A control entity coordinates the times at which the storage address of the variable is accessed.

Abstract: An arrangement for the partial release of a debug interface of a programmable hardware component, whereby a first logic for the programmable hardware component can be stored in a configuration memory and a configuration device is designed to program the programmable hardware component via a configuration interface of the programmable hardware component according to the first logic. The configuration device is further designed to register a programming process of the programmable hardware component which occurs via the debug interface according to a second logic and, upon termination of the programming process occurring via the debug interface, reprograms the programmable hardware component according to the first logic.

Abstract: An arrangement for disabling a configuration of a first programmable hardware component, having the first programmable hardware component, a second programmable hardware component, and a switching element. The first programmable hardware component has a configuration interface for configuring a logic of the first programmable hardware component, a data interface for communication of the logic with the second programmable hardware component, a debugging interface for debugging and configuring the logic, and a configuration monitoring interface for signaling a configuration process of the logic. The switching element is designed and connected to the debugging interface such that access to the debugging interface during a configuration process of the logic can be disabled.

Abstract: A communication system is provided that includes at least two peripheral devices, wherein each peripheral device has at least one I/O interface and the peripheral devices are connected to each other by at least one data bus and exchange data by means of a communication relationship via the data bus. At least one interface device has a peripheral device interface and has a data bus interface, the interface device being connectable by the peripheral device interface thereof to one of the peripheral devices via an I/O interface thereof, and the interface device being connected by the data bus interface thereof to the data bus, and the communication relationship can be preset in the interface device.

Abstract: A method for changing software in a memory of an electronic control unit, wherein each memory address from the overlay memory can be assigned to a memory address in the read-only memory by an assignment information item. During a run time of the control unit, at least a functional part of a bypass routine that is to at least partially replace an original program routine is stored in an address range in the overlay memory, or a jump instruction is stored in the overlay memory as the first part of a bypass routine that refers to a second part of the bypass routine that is stored in an address range accessible to the processor. To activate an overlay functionality the address and/or the address range of the overlay memory are assigned to an address or address range of the program routine to be replaced.

Abstract: A method for changing a software in the memory of an electronic control unit. A bypass routine is stored in the working memory of the electronic control unit, and the address of the bypass function is stored in a table. A service function reads the address from the table and calls the bypass routine. The bypass routine is replaceable at the run time of the electronic control unit by erasing the table entry. The call of the service function is integrated into the program code of the electronic control unit by an overlay memory, a memory management unit, or with the aid of watch points.

Abstract: A method for processing data of a control unit in a data communication device, which has a first memory area and a second memory area, and is connected to the control unit through an interface. Data from the control unit is transmitted to the data communication device through the interface. A value is stored identically in the first memory area and in the second memory area. The data communication device tests whether a first trigger is present, and if present, storage in the first memory area is discontinued, or the trigger class of the first trigger is tested and storage in the first memory area is discontinued only in the presence of a predefined trigger class. Subsequently, values of the data are read out from the first memory area, whereby values arriving chronologically after the first trigger are stored in the second memory area by the data communication device.

Abstract: A method is provided for processing data in an influencing device, whereby the influencing device is connected to a vehicle control unit and to a data processing unit. The vehicle control unit and the influencing device are disposed in a motor vehicle or, for example, on a test bench in a laboratory. A first program runs in the vehicle control unit. Data are exchanged according to an XCP protocol and/or a CCP protocol between the data processing unit and the influencing device. The influencing device has a second execution unit, which executes predetermined data processing steps more rapidly than the first execution unit. The data exchanged by the XCP protocol or the CCP protocol are checked for a predetermined criterion and, based on the result of the check, the data are processed either in the first execution unit or in the second execution unit.

Abstract: An adjustment device for adjusting at least one control device with at least one control device microcontroller and with at least one control device debug interface, where the adjustment device comprises at least one programmable unit, at least one data transmission interface for connecting the adjustment device to an operating unit, and at least one adjustment device debug interface for connecting the adjustment device to the control device debug interface of the control device. The adjustment device according to the invention accomplishes the objective of reducing the load on the control device due to control device application by at least one address list and at least one data list, which are provided in a memory of the adjustment device.

Abstract: A method is provided for processing data in an influencing device, whereby the influencing device is connectable to a vehicle control unit and to a data processing unit. If the influencing device receives a first trigger or a second trigger, the first trigger is checked for a valid assignment to a function implemented in the hardware or software. If there is a valid assignment, the assigned function is started. A first address and/or a second address and/or the value are checked for a valid assignment to a first sub-function or a second sub-function. Depending on the called sub-function, the value is checked and/or manipulated and depending on the result of the check, the checked value and/or the manipulated value are sent by the influencing device to the vehicle control unit and/or to the data processing unit and/or stored in the memory of the influencing device.

Abstract: A method for processing data of a control unit in a data communication device, which has a first memory area and a second memory area, and is connected to the control unit through an interface. Data from the control unit is transmitted to the data communication device through the interface. A value is stored identically in the first memory area and in the second memory area. The data communication device tests whether a first trigger is present, and if present, storage in the first memory area is discontinued, or the trigger class of the first trigger is tested and storage in the first memory area is discontinued only in the presence of a predefined trigger class. Subsequently, values of the data are read out from the first memory area, whereby values arriving chronologically after the first trigger are stored in the second memory area by the data communication device.