Patents by Inventor Marc Feron

Marc Feron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for encapsulating electronic components on a wafer
    Patent number: 8785297
    Abstract: A method for encapsulating electronic components, including the steps of: forming, in a first surface of a semiconductor wafer, electronic components; forming, on the first surface, an interconnection stack including conductive tracks and vias separated by an insulating material; forming first and second bonding pads on the interconnection stack; thinning down the wafer, except at least on its contour; filling the thinned-down region with a first resin layer; arranging at least one first chip on the first bonding pads and forming solder bumps on the second bonding pads; depositing a second resin layer covering the first chips and partially covering the solder bumps; bonding an adhesive strip on the first resin layer; and scribing the structure into individual chips.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: July 22, 2014
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Marc Feron, Vincent Jarry, Laurent Barreau
  • Method for thinning and dicing electronic circuit wafers
    Patent number: 8486763
    Abstract: A method for thinning and dicing a wafer of electronic circuits, wherein: a thinning step is carried out while the wafer is supported by a first film bonded at the periphery of a support frame; and a dicing step is carried out while the thinned wafer is supported by a second film bonded at the periphery of the same frame from the other surface of the wafer, the first film being unstuck only once the second one is in place.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: July 16, 2013
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Vincent Jarry, Marc Feron
  • METHOD FOR ENCAPSULATING ELECTRONIC COMPONENTS ON A WAFER
    Publication number: 20130043586
    Abstract: A method for encapsulating electronic components, including the steps of: forming, in a first surface of a semiconductor wafer, electronic components; forming, on the first surface, an interconnection stack including conductive tracks and vias separated by an insulating material; forming first and second bonding pads on the interconnection stack; thinning down the wafer, except at least on its contour; filling the thinned-down region with a first resin layer; arranging at least one first chip on the first bonding pads and forming solder bumps on the second bonding pads; depositing a second resin layer covering the first chips and partially covering the solder bumps; bonding an adhesive strip on the first resin layer; and scribing the structure into individual chips.
    Type: Application
    Filed: October 11, 2012
    Publication date: February 21, 2013
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Marc Feron, Vincent Jarry, Laurent Barreau
  • Method for encapsulating electronic components on a wafer
    Patent number: 8309403
    Abstract: A method for encapsulating electronic components, including the steps of: forming, in a first surface of a semiconductor wafer, electronic components; forming, on the first surface, an interconnection stack including conductive tracks and vias separated by an insulating material; forming first and second bonding pads on the interconnection stack; thinning down the wafer, except at least on its contour; filling the thinned-down region with a first resin layer; arranging at least one first chip on the first bonding pads and forming solder bumps on the second bonding pads; depositing a second resin layer covering the first chips and partially covering the solder bumps; bonding an adhesive strip on the first resin layer; and scribing the structure into individual chips.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: November 13, 2012
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Marc Feron, Vincent Jarry, Laurent Barreau
  • METHOD FOR THINNING AND DICING ELECTRONIC CIRCUIT WAFERS
    Publication number: 20120149174
    Abstract: A method for thinning and dicing a wafer of electronic circuits, wherein: a thinning step is carried out while the wafer is supported by a first film bonded at the periphery of a support frame; and a dicing step is carried out while the thinned wafer is supported by a second film bonded at the periphery of the same frame from the other surface of the wafer, the first film being unstuck only once the second one is in place.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 14, 2012
    Inventors: Vincent Jarry, Marc Feron
  • METHOD FOR ENCAPSULATING ELECTRONIC COMPONENTS ON A WAFER
    Publication number: 20110124157
    Abstract: A method for encapsulating electronic components, including the steps of: forming, in a first surface of a semiconductor wafer, electronic components; forming, on the first surface, an interconnection stack including conductive tracks and vias separated by an insulating material; forming first and second bonding pads on the interconnection stack; thinning down the wafer, except at least on its contour; filling the thinned-down region with a first resin layer; arranging at least one first chip on the first bonding pads and forming solder bumps on the second bonding pads; depositing a second resin layer covering the first chips and partially covering the solder bumps; bonding an adhesive strip on the first resin layer; and scribing the structure into individual chips.
    Type: Application
    Filed: November 16, 2010
    Publication date: May 26, 2011
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Marc Feron, Vincent Jarry, Laurent Barreau