Patents by Inventor Marc Houdebine
Marc Houdebine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12249991Abstract: A clock generator circuit includes an oscillator circuit coupled to a bias circuit. The bias circuit includes a current mirror, third and fourth transistors, and a cascode transistor. The current mirror includes a reference transistor and a set of copy transistors that are programmable. The third transistor has a source connected to a cold spot, a drain and a gate connected to this drain. The fourth transistor has a source connected to the drain of the third transistor, a drain, and a gate connected to that drain. The cascode transistor has a source connected to a drain of at least one of the copy transistors, a drain, and a gate connected to the gate of the fourth transistor. The gates of the fourth transistor and the cascode transistor are thicker than the gates of the reference transistor, each copy transistor, and the third transistor.Type: GrantFiled: June 30, 2023Date of Patent: March 11, 2025Assignee: STMicroelectronics FranceInventors: Laurent Jean Garcia, Marc Houdebine
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Publication number: 20240232549Abstract: In one embodiment, an object can communicate contactlessly with a reader using active load modulation. The method includes detecting a sensing magnetic field emitted by the reader, initializing a phase-locked loop of the object, detecting a stopping of the sensing magnetic field emitted by the reader before initializing the phase-locked loop of the object is complete, calibrating an oscillator of the phase-locked loop on the basis of an internal clock of the object, detecting a new sensing magnetic field of the reader after calibrating the oscillator, and implementing the phase-locked loop to adjust the phase of the oscillator after detecting a new sensing magnetic field.Type: ApplicationFiled: October 13, 2023Publication date: July 11, 2024Inventors: Florent Sibille, Marc Houdebine
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Publication number: 20240135119Abstract: In one embodiment, an object can communicate contactlessly with a reader using active load modulation. The method includes detecting a sensing magnetic field emitted by the reader, initializing a phase-locked loop of the object, detecting a stopping of the sensing magnetic field emitted by the reader before initializing the phase-locked loop of the object is complete, calibrating an oscillator of the phase-locked loop on the basis of an internal clock of the object, detecting a new sensing magnetic field of the reader after calibrating the oscillator, and implementing the phase-locked loop to adjust the phase of the oscillator after detecting a new sensing magnetic field.Type: ApplicationFiled: October 12, 2023Publication date: April 25, 2024Inventors: Florent Sibille, Marc Houdebine
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Publication number: 20240014809Abstract: A clock generator circuit includes an oscillator circuit coupled to a bias circuit. The bias circuit includes a current mirror, third and fourth transistors, and a cascode transistor. The current mirror includes a reference transistor and a set of copy transistors that are programmable. The third transistor has a source connected to a cold spot, a drain and a gate connected to this drain. The fourth transistor has a source connected to the drain of the third transistor, a drain, and a gate connected to that drain. The cascode transistor has a source connected to a drain of at least one of the copy transistors, a drain, and a gate connected to the gate of the fourth transistor. The gates of the fourth transistor and the cascode transistor are thicker than the gates of the reference transistor, each copy transistor, and the third transistor.Type: ApplicationFiled: June 30, 2023Publication date: January 11, 2024Inventors: Laurent Jean Garcia, Marc Houdebine
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Publication number: 20230318658Abstract: A device is configured to receive a first carrier signal, and deliver a second carrier signal, and has a phase-locked loop including a first domain including an oscillator configured to generate a signal at a given frequency, and a circuit configured to generate information representative of the frequency of the signal generated by the oscillator, and to generate the second carrier signal and a clock signal, the first domain being clocked by the first carrier signal, a second domain, clocked by the clock signal, including a circuit configured to compare the frequency of the signal generated by the oscillator with the frequency of the first carrier signal and to control the oscillator, a matching circuit configured to transfer information representative of the frequency of the signal generated by the oscillator from the first domain to the second domain.Type: ApplicationFiled: February 24, 2023Publication date: October 5, 2023Inventors: Gregoire Montjaux, Marc Houdebine
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Patent number: 11736148Abstract: An embodiment device comprises a phase locked loop and a frequency locked loop having in common the same controlled oscillator. The device is firstly placed in the card emulation mode at the beginning of a communication between the contactless communication device and a contactless reader, the firstly placing comprising synchronizing within the contactless device, an ALM carrier frequency with a reader carrier frequency by operating at least the phase locked loop, and upon reception by the contactless communication device of an indication sent by the reader indicating a further communication in a peer to peer mode with the reader, the device is secondly placed in the peer to peer mode, the secondly placing including deactivating the phase locked loop and operating the frequency locked loop with a reference clock signal and a frequency set point depending on the reader carrier frequency and the frequency of the reference clock signal.Type: GrantFiled: July 26, 2021Date of Patent: August 22, 2023Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS RAZVOJ POLPREVODNIKOV D.O.O.Inventors: Marc Houdebine, Kosta Kovacic, Florent Sibille
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Publication number: 20220029660Abstract: An embodiment device comprises a phase locked loop and a frequency locked loop having in common the same controlled oscillator. The device is firstly placed in the card emulation mode at the beginning of a communication between the contactless communication device and a contactless reader, the firstly placing comprising synchronizing within the contactless device, an ALM carrier frequency with a reader carrier frequency by operating at least the phase locked loop, and upon reception by the contactless communication device of an indication sent by the reader indicating a further communication in a peer to peer mode with the reader, the device is secondly placed in the peer to peer mode, the secondly placing including deactivating the phase locked loop and operating the frequency locked loop with a reference clock signal and a frequency set point depending on the reader carrier frequency and the frequency of the reference clock signal.Type: ApplicationFiled: July 26, 2021Publication date: January 27, 2022Inventors: Marc Houdebine, Kosta Kovacic, Florent Sibille
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Patent number: 11190236Abstract: An embodiment near-field communication device using active load modulation, in card emulation mode and intended to communicate with a reader, comprises a digital phase-locked loop configured to generate a carrier signal, having an oscillator configured to generate the carrier signal in a manner controlled by an analog control signal, a feedback circuit configured to generate a digital control signal, a digital-to-analog converter configured to convert the digital control signal into the analog control signal, and an integrator assembly configured to integrate the analog control signal.Type: GrantFiled: October 26, 2020Date of Patent: November 30, 2021Assignee: STMICROELECTRONICS SAInventors: Marc Houdebine, Laurent Jean Garcia
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Publication number: 20210126672Abstract: An embodiment near-field communication device using active load modulation, in card emulation mode and intended to communicate with a reader, comprises a digital phase-locked loop configured to generate a carrier signal, having an oscillator configured to generate the carrier signal in a manner controlled by an analog control signal, a feedback circuit configured to generate a digital control signal, a digital-to-analog converter configured to convert the digital control signal into the analog control signal, and an integrator assembly configured to integrate the analog control signal.Type: ApplicationFiled: October 26, 2020Publication date: April 29, 2021Inventors: Marc Houdebine, Laurent Jean Garcia
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Patent number: 10841887Abstract: Data frames, including bursts of an active load modulation (ALM) carrier signal generated from a modulation of an underlying carrier, are transmitted from an object to a reader. Synchronizing a reader carrier signal and the ALM carrier signal includes: prior to transmission of each data frame and between some of the bursts of the ALM carrier signal of each data frame, performing a closed-loop control of an output signal of a main oscillator onto a phase and a frequency of the reader carrier signal; estimating a ratio between a frequency of the output signal of the main oscillator and a frequency of a reference signal produced by a reference oscillator; and during each burst of the ALM carrier signal of each data frame, performing a closed-loop control in frequency only of the output signal of the main oscillator onto the reference frequency of the reference signal corrected by the ratio.Type: GrantFiled: January 17, 2019Date of Patent: November 17, 2020Assignee: STMICROELECTRONICS SAInventor: Marc Houdebine
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Patent number: 10841074Abstract: A transponder communicates with a reader using active load modulation. The transponder includes a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to carrier clock of the reader. Between transmission of data frames, the DPLL is placed in a lock mode of operation in which a feedback loop of the DPLL is closed. Within a transmitted data frame having a duration, the DPLL is placed, for the duration of the transmitted data frame, in a hold mode of operation in which the feedback loop is opened. A phase of the ALM carrier clock is adjusted at least once during the duration of the transmitted data frame.Type: GrantFiled: December 23, 2019Date of Patent: November 17, 2020Assignees: STMicroelectronics SA, STMicroelectronics Razvoj Polprevodnikov d.o.o.Inventors: Maksimiljan Stiglic, Nejc Suhadolnik, Marc Houdebine
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Patent number: 10823771Abstract: A method includes a) counting whole periods of a signal during a first period of a reference signal, b) repeating step a) for each period of the reference signal until a first duration is equal to a first quantity of periods of the reference signal, and c) determining a first average of the whole periods. The method also includes repeating at least one of steps a) to c) and at each repetition shifting a start of the counting of step a) by at least one period of the reference signal, and in steps b) and c) accounting for whole periods of the signal already counted during the at least one preceding group of steps a) and b). The method includes determining a second average of the first averages, and determining the frequency of the signal from the second average and the frequency of the reference signal.Type: GrantFiled: February 20, 2019Date of Patent: November 3, 2020Assignee: STMICROELECTRONICS SAInventors: Marc Houdebine, Sebastien Dedieu
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Synchronization between an object and a reader contactlessly communicating by active load modulation
Patent number: 10749719Abstract: A method of contactless communication can be performed between an object and a reader using active load modulation. A synchronization process is performed between a first carrier signal transmitted by the reader and having a reference frequency, and a second carrier signal extracted from an output signal of a controlled oscillator of a digital phase-locked loop of the object. In the synchronization process, as long as a locking of the loop has not been detected, the frequency of the output signal of the oscillator is latched on a frequency that is a multiple of the reference frequency. Once the locking has been detected, the latching continues while controlling the oscillator with a second control signal generated from a second value obtained.Type: GrantFiled: September 13, 2019Date of Patent: August 18, 2020Assignee: STMicroelectronics S.A.Inventor: Marc Houdebine -
SYNCHRONIZATION BETWEEN AN OBJECT AND A READER CONTACTLESSLY COMMUNICATING BY ACTIVE LOAD MODULATION
Publication number: 20200099554Abstract: A method of contactless communication can be performed between an object and a reader using active load modulation. A synchronization process is performed between a first carrier signal transmitted by the reader and having a reference frequency, and a second carrier signal extracted from an output signal of a controlled oscillator of a digital phase-locked loop of the object. In the synchronization process, as long as a locking of the loop has not been detected, the frequency of the output signal of the oscillator is latched on a frequency that is a multiple of the reference frequency. Once the locking has been detected, the latching continues while controlling the oscillator with a second control signal generated from a second value obtained.Type: ApplicationFiled: September 13, 2019Publication date: March 26, 2020Inventor: Marc Houdebine -
Patent number: 10560255Abstract: A transponder communicates with a reader using active load modulation. The transponder includes a digital phase locked loop (DPLL), which, in operation, generates an active load modulation (ALM) carrier clock synchronized to carrier clock of the reader. Between transmission of data frames, the DPLL is placed in a lock mode of operation in which a feedback loop of the DPLL is closed. Within a transmitted data frame having a duration, the DPLL is placed, for the duration of the transmitted data frame, in a hold mode of operation in which the feedback loop is opened. A phase of the ALM carrier clock is adjusted at least once during the duration of the transmitted data frame.Type: GrantFiled: July 6, 2018Date of Patent: February 11, 2020Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS RAZVOJ POLPREVODNIKOV D.O.O.Inventors: Maksimiljan Stiglic, Nejc Suhadolnik, Marc Houdebine
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Publication number: 20190230611Abstract: Data frames, including bursts of an active load modulation (ALM) carrier signal generated from a modulation of an underlying carrier, are transmitted from an object to a reader. Synchronizing a reader carrier signal and the ALM carrier signal includes: prior to transmission of each data frame and between some of the bursts of the ALM carrier signal of each data frame, performing a closed-loop control of an output signal of a main oscillator onto a phase and a frequency of the reader carrier signal; estimating a ratio between a frequency of the output signal of the main oscillator and a frequency of a reference signal produced by a reference oscillator; and during each burst of the ALM carrier signal of each data frame, performing a closed-loop control in frequency only of the output signal of the main oscillator onto the reference frequency of the reference signal corrected by the ratio.Type: ApplicationFiled: January 17, 2019Publication date: July 25, 2019Inventor: Marc Houdebine
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Publication number: 20190178922Abstract: A method includes a) counting whole periods of a signal during a first period of a reference signal, b) repeating step a) for each period of the reference signal until a first duration is equal to a first quantity of periods of the reference signal, and c) determining a first average of the whole periods. The method also includes repeating at least one of steps a) to c) and at each repetition shifting a start of the counting of step a) by at least one period of the reference signal, and in steps b) and c) accounting for whole periods of the signal already counted during the at least one preceding group of steps a) and b). The method includes determining a second average of the first averages, and determining the frequency of the signal from the second average and the frequency of the reference signal.Type: ApplicationFiled: February 20, 2019Publication date: June 13, 2019Inventors: Marc Houdebine, Sebastien Dedieu
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Patent number: 10261117Abstract: A method includes a) counting whole periods of a signal during a first period of a reference signal, b) repeating step a) for each period of the reference signal until a first duration is equal to a first quantity of periods of the reference signal, and c) determining a first average of the whole periods. The method also includes repeating at least one of steps a) to c) and at each repetition shifting a start of the counting of step a) by at least one period of the reference signal, and in steps b) and c) accounting for whole periods of the signal already counted during the at least one preceding group of steps a) and b). The method includes determining a second average of the first averages, and determining the frequency of the signal from the second average and the frequency of the reference signal.Type: GrantFiled: April 27, 2016Date of Patent: April 16, 2019Assignee: STMicroelectronics SAInventors: Marc Houdebine, Sebastien Dedieu
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Patent number: 10135451Abstract: In some embodiments, a phase locked loop includes a voltage-controlled oscillator whose output is fed back to a first input of a phase comparator via a fractional divider controlled by a delta-sigma modulator. The method of doubling the frequency of the initial reference signal of the phase locked loop involves generating, from the initial reference signal and the output signal furnished by the voltage-controlled oscillator, a secondary reference signal having edges of a first type synchronized with each of the rising and falling edges of the initial reference signal and edges of a second type between the edges of the first type, and a furnishing of the secondary reference signal at a second input of the phase comparator operating on the edges of the first type.Type: GrantFiled: November 1, 2017Date of Patent: November 20, 2018Assignee: STMicroelectronics SAInventors: Marc Houdebine, Sebastien Dedieu
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Publication number: 20180269886Abstract: In some embodiments, a phase locked loop includes a voltage-controlled oscillator whose output is fed back to a first input of a phase comparator via a fractional divider controlled by a delta-sigma modulator. The method of doubling the frequency of the initial reference signal of the phase locked loop involves generating, from the initial reference signal and the output signal furnished by the voltage-controlled oscillator, a secondary reference signal having edges of a first type synchronized with each of the rising and falling edges of the initial reference signal and edges of a second type between the edges of the first type, and a furnishing of the secondary reference signal at a second input of the phase comparator operating on the edges of the first type.Type: ApplicationFiled: November 1, 2017Publication date: September 20, 2018Inventors: Marc Houdebine, Sebastien Dedieu