Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor die arranged within a housing of the semiconductor package. The semiconductor die holds a radio frequency circuit and a plurality of first electrical contacts. Additionally, the semiconductor package includes a plurality of second electrical contacts formed on the exterior of the housing to enable external electrical contacting of the semiconductor package. The semiconductor package further includes a plurality of transmission lines formed in or on a substrate of the semiconductor package. Each of the plurality of transmission lines couples a respective one of the plurality of first electrical contacts with a respective one of the plurality of second electrical contacts.

Abstract: A digital step attenuator for automatic gain control in a transceiver front-end. The digital step attenuator includes a series path coupled between an input port and an output port, a plurality of series shunt switches coupled in parallel to the series path, and a plurality of parallel paths coupled to the series path in parallel. The series path includes a plurality of series resistors coupled in series. Each series shunt switch is for by-passing a different set of one or more series resistors. Each parallel path includes a parallel resistor and a parallel shunt switch, and each parallel path is coupled to either the input port, the output port, or an internal node between two adjacent series resistors, in parallel. A plurality of different ?-attenuators with a different topology are formed by selectively controlling the series shunt switches and the parallel shunt switches.

Abstract: A radio frequency front-end (RF-FE) device with a reconfigurable common-mode feedback control. The device includes a plurality of RF-FE channels and a reconfiguration switch. An RF-FE channel includes a common-mode feedback loop. The common-mode feedback loop is configured to detect a common-mode signal in differential signals in the RF-FE channel and generate a feedback signal to set the common-mode signal. The reconfiguration switch is configured to couple common-mode feedback loops of two or more RF-FE channels based on an operation mode. The reconfiguration switch may be controlled to couple common-mode feedback loops of two or more RF-FE channels if the two or more RF-FE channels receive a same input signal and decouple common-mode feedback loops of two or more RF-FE channels if the two or more RF-FE channels receive different input signals.

Abstract: A current feedback amplifier (CFA). The CFA includes a common-gate input stage, a biasing circuitry, and a differential pair coupled in parallel between the supply voltage node and the reference voltage node. The common-gate input stage amplifies an input signal received at an input node and supplies it to a gate of the complementary transistors of the differential pair. The biasing circuitry supplies a bias voltage to a gate of the transistors of the common-gate input stage. The input node of the common-gate input stage and a node between the complementary transistors in the first path of the differential pair are shorted.

Abstract: A semiconductor device comprising at least one transmit path is provided. The transmit path comprises an input node for receiving a digital baseband signal. Further, the transmit path comprises digital mixer circuitry coupled to the input node and configured to generate an upconverted digital baseband signal by upconverting a frequency of the digital baseband signal. Additionally, the transmit path comprises Digital-to-Analog Converter (DAC) circuitry coupled to the digital mixer circuitry and configured to generate an analog radio frequency signal based on the upconverted digital baseband signal. The transmit path comprises first analog mixer circuitry coupleable to an output of the DAC circuitry, and second analog mixer circuitry coupleable to the output of the DAC circuitry. Further, the transmit path comprises a first output node coupleable to an output of the first analog mixer circuitry, and a second output node coupleable to an output of the second analog mixer circuitry.

Abstract: A wireless communication system including a phased array comprising a plurality of antennas configured to emit a respective radio wave based on a respective antenna signal. Further, the system includes a plurality of power amplifiers each coupled to one of the plurality of antennas via a feed line and configured to output the antenna signal to the feed line. Also, the system includes a plurality of directional couplers each coupled into one of the feed lines and comprising a third port configured to output a fraction of a power received at a first port coupled to the power amplifier via the feed line, likewise a fourth port configured to output a fraction of a power received at a second port. Additionally, the system includes switching circuitry configured to alternately couple the third port to a first feedback receiver, and to alternately couple the fourth port to a second feedback receiver.

Abstract: A system and method for digital correction for a dynamically varying non-linear system. The system includes a correction circuitry including at least one look-up table (LUT). The correction circuitry is configured to receive an input signal and modify the input signal to be processed by the non-linear system using at least one LUT to correct non-linearity incurred by the non-linear system. The at least one LUT is addressed by a magnitude or power of the input signal and a dynamically varying parameter associated with the input signal. The dynamically varying parameter may be one of average signal power of the input signal, a differential of the average power of the input signal, a directional beam index, or temperature.

Abstract: A method and apparatus for cancelling local oscillator feedthrough (LOFT). A transmitter includes a first mixer configured to mix a transmit signal with a first local oscillator signal. An observation receiver receives a fraction of a power of the transmit signal as a feedback signal and processes the feedback signal. The observation receiver includes a second mixer configured to mix the feedback signal with a second local oscillator signal. A LOFT correction estimation circuitry is configured to determine a DC offset to cancel LOFT at the first mixer in the transmitter based on measurements on outputs of the second mixer. An LOFT correction circuitry is configured to add the DC offset to the transmit signal. The LOFT correction estimation circuitry may determine the DC offset based on several measurements obtained by varying the DC offset and a phase shift in the second local oscillator signal in the observation receiver.

Abstract: An apparatus and method for in-phase/quadrature (I/Q) imbalance correction in a transceiver. The apparatus includes an I/Q imbalance correction circuit and a correction coefficient generation circuit. The I/Q imbalance correction circuit is configured to modify I/Q data in a frequency domain using correction coefficients to generate corrected I/Q data. The correction coefficient generation circuit is configured to generate the correction coefficients for the I/Q imbalance correction circuit based on the I/Q data and reference data.

Abstract: The invention provides a radar system comprising a power amplifier and a mixer, wherein the power amplifier and the mixer are integrated in a common semiconductor chip. For detecting a target object with the radar system, a high frequency signal from the power amplifier is employed as a local oscillator signal for the mixer, the radar system comprising the power amplifier and the mixer.

Abstract: A multifunction RF circuit on a single semiconductor chip. The multifunction RF circuit includes a power amplifier circuit, a mixer circuit forming an integral part of the power amplifier circuit and a low-pass filter circuit. The power amplifier circuit may include two amplifier circuits.

Abstract: A power amplifier comprises a control signal generator providing a first and a second signal, a first amplifier comprising a first transistor and a first cascode transistor for the amplification of the first signal, a second amplifier comprising a second transistor and a second cascode transistor for the amplification of the second signal, and an output coupler which couples an output of the first amplifier and an output of the second amplifier to an output terminal of the amplifier arrangement.

Abstract: A power amplifier comprises a control signal generator providing a first and a second signal, a first amplifier comprising a first transistor and a first cascode transistor for the amplification of the first signal, a second amplifier comprising a second transistor and a second cascode transistor for the amplification of the second signal, and an output coupler which couples an output of the first amplifier and an output of the second amplifier to an output terminal of the amplifier arrangement.