Patents by Inventor Marc Pegolotti

Marc Pegolotti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11995010
    Abstract: Systems and methods relate to a bus adapter for a storage network. The bus adaptor includes a context memory comprising a first storage for uncacheable exchange resource indicators (XRI) and a second storage for cacheable XRI. The bus adapter also includes a host backing store unit configured to provide access to the different tier memories present locally or externally in the host memory extension using several caching sub-units and with the capability of an optional pinning operation for the cacheable XRI based upon at least one of input/output phase, first in line up to a limit, a region of a virtual context address associated with the cacheable XRI indicators, a protocol associated with the cacheable XRI, a size of a transaction, or work queue information.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: May 28, 2024
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Marc Pegolotti, Kenny Wu, Ravi Shenoy, Gregorio Gervasio, Jr., Lalit Chhabra, Mark Karnowski, James Winston Smart, Vuong Cao Nguyen
  • Publication number: 20220334985
    Abstract: Systems and methods relate to a bus adapter for a storage network. The bus adaptor includes a context memory comprising a first storage for uncacheable exchange resource indicators (XRI) and a second storage for cacheable XRI. The bus adapter also includes a host backing store unit configured to provide access to the different tier memories present locally or externally in the host memory extension using several caching sub-units and with the capability of an optional pinning operation for the cacheable XRI based upon at least one of input/output phase, first in line up to a limit, a region of a virtual context address associated with the cacheable XRI indicators, a protocol associated with the cacheable XRI, a size of a transaction, or work queue information.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Inventors: Marc Pegolotti, Kenny Wu, Ravi Shenoy, Gregorio Gervasio, JR., Lalit Chhabra, Mark Karnowski, James Winston Smart, Vuong Cao Nguyen