Patents by Inventor Marc Pirot

Marc Pirot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8974216
    Abstract: A solution for texturing silicon wafers configured to constitute photovoltaic (PV) cells. Silicon wafers can be produced, the surface of which include uniformly engraved patterns having a depth of between 5 and 50 ?m.
    Type: Grant
    Filed: April 27, 2011
    Date of Patent: March 10, 2015
    Assignee: Commissariat a l' énergie atomique et aux énergies alternatives
    Inventors: Jean-Paul Garandet, Jacky Bancillon, Luc Federzoni, Marc Pirot
  • Publication number: 20130040105
    Abstract: A solution for texturing silicon wafers configured to constitute photovoltaic (PV) cells. Silicon wafers can be produced, the surface of which include uniformly engraved patterns having a depth of between 5 and 50 ?m.
    Type: Application
    Filed: April 27, 2011
    Publication date: February 14, 2013
    Applicant: Commissariat a L'energie Atomique et aux energies alternatives
    Inventors: Jean-Paul Garandet, Jacky Bancillon, Luc Federzoni, Marc Pirot
  • Patent number: 7364938
    Abstract: This invention relates to a process for making a semiconductor device comprising the following steps: a doped region with a first type of conductivity is made on a first principal face of a semiconductor substrate and at least one window is made, a first metallisation area is deposited on the doped region, a dielectric layer is deposited on at least the window and the first metallisation area, at least a first opening is etched in the dielectric layer at the window to accommodate a doped region with a second type of conductivity while arranging an undoped portion of the semiconductor substrate laterally between the doped regions, the substrate is doped to create the doped region with the second type of conductivity, a second metallisation area is deposited. Application particularly for solar cells in thin layer.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: April 29, 2008
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Pierre-Jean Ribeyron, Marc Pirot
  • Publication number: 20060275936
    Abstract: This invention relates to a process for making a semiconductor device comprising the following steps: a doped region with a first type of conductivity is made on a first principal face of a semiconductor substrate and at least one window is made, a first metallisation area is deposited on the doped region, a dielectric layer is deposited on at least the window and the first metallisation area, at least a first opening is etched in the dielectric layer at the window to accommodate a doped region with a second type of conductivity while arranging an undoped portion of the semiconductor substrate laterally between the doped regions, the substrate is doped to create the doped region with the second type of conductivity, a second metallisation area is deposited. Application particularly for solar cells in thin layer.
    Type: Application
    Filed: April 27, 2004
    Publication date: December 7, 2006
    Inventors: Pierre-Jean Ribeyron, Marc Pirot