Patents by Inventor Marc Reuben Hutner

Marc Reuben Hutner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9959186
    Abstract: A test system that enables real-time interactive debugging of a device under test (DUT) using native customer code. A translation module may format, in real time, debug commands, corresponding to a user input, into a format recognizable by instruments in a tester. The user input may be a test program or test instructions written in a high-level programming language. The translation module may translate the user's debug commands into lower-level test instrument commands, based on which the tester may apply control signals to a processor in the DUT to test subsystems of the DUT. A result of the test may be provided to the translation module, which may, in real time, format another debug command, or provide an indication of the result to the user. The translation module may thus enable a user to step-through and modify native customer code in an interactive manner to debug a DUT.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: May 1, 2018
    Assignee: Teradyne, Inc.
    Inventors: Marc Reuben Hutner, John F. Rowe
  • Patent number: 9244126
    Abstract: A test technique that may be implemented in an automated test system for testing semiconductor devices. The test technique may enable the fast detection of a signal transition, such as an edge, within a waveform and the timing of that event. Circuitry within a digital instrument that can be quickly and flexibly programmed may, at least in part, implement the test technique. That circuitry may be simply programmed with testing parameters, such that application of the technique may lead to faster test development and faster times. In operation, that circuitry receives parameters specifying parameters of a window over a waveform in which samples of the waveform will be taken to detect the signal transition. The circuitry may convert these parameters into control signals for other components in the test system, such as an edge generator or pin electronics, to take a programmed number of samples at desired times.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: January 26, 2016
    Assignee: Teradyne, Inc.
    Inventors: Ronald A. Sartschev, Edward J. Seng, Marc Reuben Hutner
  • Publication number: 20150128003
    Abstract: A test technique that may be implemented in an automated test system for testing semiconductor devices. The test technique may enable the fast detection of a signal transition, such as an edge, within a waveform and the timing of that event. Circuitry within a digital instrument that can be quickly and flexibly programmed may, at least in part, implement the test technique. That circuitry may be simply programmed with testing parameters, such that application of the technique may lead to faster test development and faster times. In operation, that circuitry receives parameters specifying parameters of a window over a waveform in which samples of the waveform will be taken to detect the signal transition. The circuitry may convert these parameters into control signals for other components in the test system, such as an edge generator or pin electronics, to take a programmed number of samples at desired times.
    Type: Application
    Filed: November 6, 2013
    Publication date: May 7, 2015
    Applicant: Teradyne, Inc.
    Inventors: Ronald A. Sartschev, Edward J. Seng, Marc Reuben Hutner
  • Publication number: 20140143600
    Abstract: A test system that enables real-time interactive debugging of a device under test (DUT) using native customer code. A translation module may format, in real time, debug commands, corresponding to a user input, into a format recognizable by instruments in a tester. The user input may be a test program or test instructions written in a high-level programming language. The translation module may translate the user's debug commands into lower-level test instrument commands, based on which the tester may apply control signals to a processor in the DUT to test subsystems of the DUT. A result of the test may be provided to the translation module, which may, in real time, format another debug command, or provide an indication of the result to the user. The translation module may thus enable a user to step-through and modify native customer code in an interactive manner to debug a DUT.
    Type: Application
    Filed: November 19, 2012
    Publication date: May 22, 2014
    Applicant: Teradyne, Inc.
    Inventors: Marc Reuben Hutner, John F. Rowe