Abstract: A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.

Abstract: A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.

Abstract: A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.

Abstract: A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.

Abstract: A semiconductor fabrication process includes forming a gate electrode overlying a substrate. A first silicon nitride spacer is formed adjacent the gate electrode sidewalls and a disposable silicon nitride spacer is then formed adjacent the offset spacer. An elevated source/drain structure, defined by the boundaries of the disposable spacer, is then formed epitaxially. The disposable spacer is then removed to expose the substrate proximal to the gate electrode and a shallow implant, such as a halo or extension implant, is introduced into the exposed substrate proximal the gate electrode. A replacement spacer is formed substantially where the disposable spacer existed a source/drain implant is done to introduce a source/drain impurity distribution into the elevated source drain. The gate electrode may include an overlying silicon nitride capping layer and the first silicon nitride spacer may contact the capping layer to surround the polysilicon gate electrode in silicon nitride.

Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.

Abstract: Heating a reaction chamber or other apparatus in the absence of product wafers to a “curing” temperature above a deposition temperature between the deposition of a film on a first set of semiconductor product wafers and the deposition of a film on a second set of semiconductor product wafers. In some embodiments, a boat with filler wafers is in the reaction chamber when the reaction chamber is heated to the curing temperature. In some examples, the films are deposited by a low pressure chemical vapor deposition (LPCVD) process. With some processes, if the deposition of a film on product wafers is at a temperature below a certain temperature, the film deposited with the product wafer on a boat, filler wafers, and/or other structures in the reaction chamber can cause contamination of product wafers subsequently deposited with a film in the presence of the boat and filler wafers.

Abstract: Heating a reaction chamber or other apparatus in the absence of product wafers to a “curing” temperature above a deposition temperature between the deposition of a film on a first set of semiconductor product wafers and the deposition of a film on a second set of semiconductor product wafers. In some embodiments, a boat with filler wafers is in the reaction chamber when the reaction chamber is heated to the curing temperature. In some examples, the films are deposited by a low pressure chemical vapor deposition (LPCVD) process. With some processes, if the deposition of a film on product wafers is at a temperature below a certain temperature, the film deposited with the product wafer on a boat, filler wafers, and/or other structures in the reaction chamber can cause contamination of product wafers subsequently deposited with a film in the presence of the boat and filler wafers.

Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.

Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.

Abstract: A method for providing gates of transistors with at least two different work functions utilizes a silicidation of two different metals at different times, silicidation for one gate and polysilicon for the other, or silicidation using a single metal with two differently doped silicon structures. Thus the problem associated with performing silicidation of two different metals at the same time is avoided. If the two metals have significantly different silicidation temperatures, the one with the lower temperature silicidation will likely have significantly degraded performance as a result of having to also experience the higher temperature required to achieve silicidation with the other metal.