Abstract: A device is proved for measuring surfaces of joint locations of at least two joint parts to be connected, e.g., for connection thereof. The device comprises an application mechanism for applying an application agent to the joint locations, at least one measurement mechanism for measuring the surfaces of the joint locations, and a movement mechanism for moving the measurement mechanism along the joint locations. At least one application parameter is determined depending on the surfaces measured, whereby a surface-dependent application process can be achieved.

Abstract: Assembly parts are bonded together, the parts having adhesive surfaces on end surfaces thereof to be joined together, e.g., for bonding together rotor blade half shells to form a rotor blade for a wind turbine. The assembly parts can be bonded together by injection-bonding, an adhesive being injected into an adhesive joint between the adhesive surfaces of the assembly parts.

Abstract: The state of a ferroelectric transistor in a memory cell is read or stored, and the threshold voltage of further ferroelectric transistors in further memory cells in the memory matrix is increased during the reading or storing, or is increased permanently. A memory configuration including ferroelectric memory cells is also provided.

Abstract: An integrated memory has word lines that run in a first direction, and bit lines and control lines that run in a second direction, which is perpendicular to the first direction. A controllable path of each memory transistor connects one of the bit lines to one of the control lines. The control electrode of each memory transistor is connected to one of the word lines. Since the bit lines and control lines run in the same direction and are thus arranged parallel to one another, they can be arranged within a common wiring plane of the integrated memory. Since the terminals of the controllable path are usually likewise arranged in a common wiring plane, for example in a substrate of the integrated memory, it is possible, to arrange the bit lines and control lines in the same wiring plane as the controllable path of the transistors.

Abstract: An integrated memory has word lines that run in a first direction, and bit lines and control lines that run in a second direction, which is perpendicular to the first direction. A controllable path of each memory transistor connects one of the bit lines to one of the control lines. The control electrode of each memory transistor is connected to one of the word lines. Since the bit lines and control lines run in the same direction and are thus arranged parallel to one another, they can be arranged within a common wiring plane of the integrated memory. Since the terminals of the controllable path are usually likewise arranged in a common wiring plane, for example in a substrate of the integrated memory, it is possible, to arrange the bit lines and control lines in the same wiring plane as the controllable path of the transistors.

Abstract: The state of a ferroelectric transistor in a memory cell is read or stored, and the threshold voltage of further ferroelectric transistors in further memory cells in the memory matrix is increased during the reading or storing, or is increased permanently. A memory configuration including ferroelectric memory cells is also provided.