Patents by Inventor Marcel CORNU

Marcel CORNU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230342458
    Abstract: Examples include techniques to mitigate or prevent cache-based side-channel attacks to a cache. Examples include use of assigned class of service (COS) assigned to cores of a process to determine whether to notify an OS of a potential malicious application attempting to access a cache line cached to a processor cache. Examples also include marking pages in an application memory address space of a processor cache as unflushable to prevent a potentially malicious application from accessing sensitive data loaded to the application memory address space of the processor cache.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Inventors: Marcel CORNU, Tomasz KANTECKI, John J. BROWNE
  • Publication number: 20220224511
    Abstract: Examples described herein relate to executing, on at least one processor, at least one Advanced Encryption Standard (AES) instruction, having an operation code (opcode), on operands, wherein execution of the at least one AES instruction generates an S1 box and/or S2 box of initialization and keystream generation for a SNOW3 cipher operation.
    Type: Application
    Filed: March 31, 2022
    Publication date: July 14, 2022
    Inventors: Kamila LIPINSKA, Tomasz KANTECKI, Marcel CORNU, Pablo DE LARA GUARCH, Stephen MCINTYRE, Krystian MATUSIEWICZ, James GUILFORD, Vinodh GOPAL, Wajdi FEGHALI
  • Patent number: 10860714
    Abstract: Technologies for cache side channel attack detection and mitigation include an analytics server and one or more monitored computing devices. The analytics server polls each computing device for analytics counter data. The computing device generates the analytics counter data using a resource manager of a processor of the computing device. The analytics counter data may include last-level cache data or memory bandwidth data. The analytics server identifies suspicious core activity based on the analytics counter data and, if identified, deploys a detection process to the computing device. The computing device executes the detection process to identify suspicious application activity. If identified, the computing device may perform one or more corrective actions. Corrective actions include limiting resource usage by a suspicious process using the resource manager of the processor. The resource manager may limit cache occupancy or memory bandwidth used by the suspicious process.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: John J. Browne, Marcel Cornu, Timothy Verrall, Tomasz Kantecki, Niall Power, Weigang Li, Eoin Walsh, Maryam Tahhan
  • Patent number: 10754783
    Abstract: Examples include techniques to manage cache resource allocations associated with one or more cache class of service (CLOS) assignments for a processor cache. Examples include flushing portions of an allocated cache resource responsive to reassignments of CLOS.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: August 25, 2020
    Assignee: Intel Corporation
    Inventors: Tomasz Kantecki, John Browne, Chris Macnamara, Timothy Verrall, Marcel Cornu, Eoin Walsh, Andrew J. Herdrich
  • Publication number: 20190042454
    Abstract: Examples include techniques to manage cache resource allocations associated with one or more cache class of service (CLOS) assignments for a processor cache. Examples include flushing portions of an allocated cache resource responsive to reassignments of CLOS.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Inventors: Tomasz KANTECKI, John BROWNE, Chris MACNAMARA, Timothy VERRALL, Marcel CORNU, Eoin WALSH, Andrew J. HERDRICH
  • Publication number: 20190042739
    Abstract: Technologies for cache side channel attack detection and mitigation include an analytics server and one or more monitored computing devices. The analytics server polls each computing device for analytics counter data. The computing device generates the analytics counter data using a resource manager of a processor of the computing device. The analytics counter data may include last-level cache data or memory bandwidth data. The analytics server identifies suspicious core activity based on the analytics counter data and, if identified, deploys a detection process to the computing device. The computing device executes the detection process to identify suspicious application activity. If identified, the computing device may perform one or more corrective actions. Corrective actions include limiting resource usage by a suspicious process using the resource manager of the processor. The resource manager may limit cache occupancy or memory bandwidth used by the suspicious process.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Inventors: John J. Browne, Marcel Cornu, Timothy Verrall, Tomasz Kantecki, Niall Power, Weigang Li, Eoin Walsh, Maryam Tahhan