Patents by Inventor Marcel Naggatz

Marcel Naggatz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Simulating an operation of a digital circuit
    Patent number: 8346527
    Abstract: A method for simulating an operation of a digital circuit (01) is described. The method utilizes cycle simulation, wherein in a cycle based simulation model (34) of the digital circuit (01) components (02, 03, 04, 05) of the digital circuit (01) are clocked synchronously every cycle (19) of a functional clock (Clk). According to the invention, real digital circuit (01), i.e. chip or combinatorial logic (01), timing information is included in the cycle simulation by inserting delay latches (15, 16, 17) into the cycle based simulation model (34) of the digital circuit (01), wherein a non-functional clock (Sim clock) is used to clock the delay latches (15, 16, 17), so that each delay latch (15, 16, 17) delays the propagation of a signal (I, J, K) by a cycle (20) of the non-functional clock (Sim clock).
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: January 1, 2013
    Assignee: International Business Machines Corporation
    Inventors: Joerg Walter, Lothar Felten, Volker Urban, Norbert Schumacher, Marcel Naggatz
  • Simulating an Operation of a Digital Circuit
    Publication number: 20090182545
    Abstract: A method for simulating an operation of a digital circuit (01) is described. The method utilizes cycle simulation, wherein in a cycle based simulation model (34) of the digital circuit (01) components (02, 03, 04, 05) of the digital circuit (01) are clocked synchronously every cycle (19) of a functional clock (Clk). According to the invention, real digital circuit (01), i.e. chip or combinatorial logic (01), timing information is included in the cycle simulation by inserting delay latches (15, 16, 17) into the cycle based simulation model (34) of the digital circuit (01), wherein a non-functional clock (Sim clock) is used to clock the delay latches (15, 16, 17), so that each delay latch (15, 16, 17) delays the propagation of a signal (I, J, K) by a cycle (20) of the non-functional clock (Sim clock).
    Type: Application
    Filed: January 9, 2009
    Publication date: July 16, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joerg Walter, Lothar Felten, Volker Urban, Norbert Schumacher, Marcel Naggatz